summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/i915
diff options
context:
space:
mode:
Diffstat (limited to 'src/mesa/drivers/dri/i915')
-rw-r--r--src/mesa/drivers/dri/i915/i830_vtbl.c6
-rw-r--r--src/mesa/drivers/dri/i915/i915_fragprog.c19
-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c57
-rw-r--r--src/mesa/drivers/dri/i915/i915_vtbl.c9
-rw-r--r--src/mesa/drivers/dri/i915/intel_context.c20
-rw-r--r--src/mesa/drivers/dri/i915/intel_context.h1
-rw-r--r--src/mesa/drivers/dri/i915/intel_ioctl.c9
-rw-r--r--src/mesa/drivers/dri/i915/intel_pixel.c6
-rw-r--r--src/mesa/drivers/dri/i915/intel_render.c2
-rw-r--r--src/mesa/drivers/dri/i915/intel_tex.c6
-rw-r--r--src/mesa/drivers/dri/i915/server/i830_common.h16
11 files changed, 117 insertions, 34 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index d40cf705a3..cf1d0b0c1e 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -59,6 +59,11 @@ do { \
#define VRTX_TEX_SET_FMT(n, x) ((x)<<((n)*2))
#define TEXBIND_SET(n, x) ((x)<<((n)*4))
+ static void
+i830_render_prevalidate(struct intel_context *intel)
+{
+}
+
static void i830_render_start( intelContextPtr intel )
{
GLcontext *ctx = &intel->ctx;
@@ -531,4 +536,5 @@ void i830InitVtbl( i830ContextPtr i830 )
i830->intel.vtbl.update_texture_state = i830UpdateTextureState;
i830->intel.vtbl.emit_flush = i830_emit_flush;
i830->intel.vtbl.render_start = i830_render_start;
+ i830->intel.vtbl.render_prevalidate = i830_render_prevalidate;
}
diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c
index 702b878828..c839bbdea5 100644
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -29,19 +29,20 @@
#include "macros.h"
#include "enums.h"
+#include "shader/prog_instruction.h"
+#include "shader/prog_parameter.h"
+#include "shader/program.h"
+#include "shader/programopt.h"
+
#include "tnl/tnl.h"
#include "tnl/t_context.h"
+
#include "intel_batchbuffer.h"
#include "i915_reg.h"
#include "i915_context.h"
#include "i915_program.h"
-#include "prog_instruction.h"
-#include "prog_parameter.h"
-#include "program.h"
-#include "programopt.h"
-
/* 1, -1/3!, 1/5!, -1/7! */
@@ -304,7 +305,7 @@ static void upload_program( struct i915_fragment_program *p )
A0_MUL,
tmp, A0_DEST_CHANNEL_X, 0,
src0,
- i915_emit_const1f(p, 1.0/(M_PI * 2)),
+ i915_emit_const1f(p, 1.0/(M_PI)),
0);
i915_emit_arith( p,
@@ -319,7 +320,7 @@ static void upload_program( struct i915_fragment_program *p )
A0_MUL,
tmp, A0_DEST_CHANNEL_X, 0,
tmp,
- i915_emit_const1f(p, (M_PI * 2)),
+ i915_emit_const1f(p, (M_PI)),
0);
/*
@@ -645,7 +646,7 @@ static void upload_program( struct i915_fragment_program *p )
A0_MUL,
tmp, A0_DEST_CHANNEL_X, 0,
src0,
- i915_emit_const1f(p, 1.0/(M_PI * 2)),
+ i915_emit_const1f(p, 1.0/(M_PI)),
0);
i915_emit_arith( p,
@@ -660,7 +661,7 @@ static void upload_program( struct i915_fragment_program *p )
A0_MUL,
tmp, A0_DEST_CHANNEL_X, 0,
tmp,
- i915_emit_const1f(p, (M_PI * 2)),
+ i915_emit_const1f(p, (M_PI)),
0);
/*
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index a19d4b6584..2b806cc36e 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -60,6 +60,33 @@ static GLint step_offsets[6][2] = { {0,2},
#define I915_TEX_UNIT_ENABLED(unit) (1<<unit)
+static GLuint i915_compressed_alignment(GLint internal_fmt)
+{
+ GLuint alignment = 4;
+
+ switch (internal_fmt) {
+ case GL_COMPRESSED_RGB_FXT1_3DFX:
+ case GL_COMPRESSED_RGBA_FXT1_3DFX:
+ alignment = 8;
+ break;
+
+ default:
+ break;
+ }
+
+ return alignment;
+}
+
+static int align(int value, GLuint alignment)
+{
+ return (value + alignment - 1) & ~(alignment - 1);
+}
+
+static GLuint minify(GLuint d)
+{
+ return MAX2(1, d >> 1);
+}
+
static void i915LayoutTextureImages( i915ContextPtr i915,
struct gl_texture_object *tObj )
{
@@ -161,8 +188,15 @@ static void i915LayoutTextureImages( i915ContextPtr i915,
break;
}
default:
- pitch = tObj->Image[0][firstLevel]->Width * t->intel.texelBytes;
- pitch = (pitch + 3) & ~3;
+ if (baseImage->IsCompressed) {
+ GLuint alignment = i915_compressed_alignment(baseImage->InternalFormat);
+
+ pitch = align(tObj->Image[0][firstLevel]->Width, alignment) * t->intel.texelBytes;
+ } else {
+ pitch = tObj->Image[0][firstLevel]->Width * t->intel.texelBytes;
+ pitch = (pitch + 3) & ~3;
+ }
+
t->intel.base.dirty_images[0] = ~0;
for ( total_height = i = 0 ; i < numLevels ; i++ ) {
@@ -343,8 +377,23 @@ static void i945LayoutTextureImages( i915ContextPtr i915,
break;
}
default:
- pitch = tObj->Image[0][firstLevel]->Width * t->intel.texelBytes;
- pitch = (pitch + 3) & ~3;
+ if (baseImage->IsCompressed) {
+ GLuint alignment = i915_compressed_alignment(baseImage->InternalFormat);
+
+ pitch = align(tObj->Image[0][firstLevel]->Width, alignment);
+ if (numLevels > 2) {
+ GLint width0 = align(minify(tObj->Image[0][firstLevel]->Width), alignment) +
+ + align(minify(minify(tObj->Image[0][firstLevel]->Width)), alignment);
+
+ if (width0 > pitch)
+ pitch = width0;
+ }
+ pitch = pitch * t->intel.texelBytes;
+ } else {
+ pitch = tObj->Image[0][firstLevel]->Width * t->intel.texelBytes;
+ pitch = (pitch + 3) & ~3;
+ }
+
t->intel.base.dirty_images[0] = ~0;
max_offset = 0;
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index b0e5f87fc7..4ad95cf4e3 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -41,7 +41,8 @@
#include "i915_reg.h"
#include "i915_context.h"
-static void i915_render_start( intelContextPtr intel )
+static void
+i915_render_prevalidate(struct intel_context *intel)
{
GLcontext *ctx = &intel->ctx;
i915ContextPtr i915 = I915_CONTEXT(intel);
@@ -54,6 +55,10 @@ static void i915_render_start( intelContextPtr intel )
}
}
+static void i915_render_start( intelContextPtr intel )
+{
+}
+
static void i915_reduced_primitive_state( intelContextPtr intel,
GLenum rprim )
@@ -64,6 +69,7 @@ static void i915_reduced_primitive_state( intelContextPtr intel,
st1 &= ~ST1_ENABLE;
switch (rprim) {
+ case GL_QUADS: /* from RASTERIZE(GL_QUADS) in t_dd_tritemp.h */
case GL_TRIANGLES:
if (intel->ctx.Polygon.StippleFlag &&
intel->hw_stipple)
@@ -453,6 +459,7 @@ void i915InitVtbl( i915ContextPtr i915 )
i915->intel.vtbl.lost_hardware = i915_lost_hardware;
i915->intel.vtbl.reduced_primitive_state = i915_reduced_primitive_state;
i915->intel.vtbl.render_start = i915_render_start;
+ i915->intel.vtbl.render_prevalidate = i915_render_prevalidate;
i915->intel.vtbl.set_color_region = i915_set_color_region;
i915->intel.vtbl.set_z_region = i915_set_z_region;
i915->intel.vtbl.update_color_z_regions = i915_update_color_z_regions;
diff --git a/src/mesa/drivers/dri/i915/intel_context.c b/src/mesa/drivers/dri/i915/intel_context.c
index 11c23f24a1..07bee4ef9f 100644
--- a/src/mesa/drivers/dri/i915/intel_context.c
+++ b/src/mesa/drivers/dri/i915/intel_context.c
@@ -564,16 +564,16 @@ void intelWindowMoved( intelContextPtr intel )
drmI830Sarea *sarea = intel->sarea;
drm_clip_rect_t drw_rect = { .x1 = dPriv->x, .x2 = dPriv->x + dPriv->w,
.y1 = dPriv->y, .y2 = dPriv->y + dPriv->h };
- drm_clip_rect_t pipeA_rect = { .x1 = sarea->pipeA_x,
- .x2 = sarea->pipeA_x + sarea->pipeA_w,
- .y1 = sarea->pipeA_y,
- .y2 = sarea->pipeA_y + sarea->pipeA_h };
- drm_clip_rect_t pipeB_rect = { .x1 = sarea->pipeB_x,
- .x2 = sarea->pipeB_x + sarea->pipeB_w,
- .y1 = sarea->pipeB_y,
- .y2 = sarea->pipeB_y + sarea->pipeB_h };
- GLint areaA = driIntersectArea( drw_rect, pipeA_rect );
- GLint areaB = driIntersectArea( drw_rect, pipeB_rect );
+ drm_clip_rect_t planeA_rect = { .x1 = sarea->planeA_x,
+ .x2 = sarea->planeA_x + sarea->planeA_w,
+ .y1 = sarea->planeA_y,
+ .y2 = sarea->planeA_y + sarea->planeA_h };
+ drm_clip_rect_t planeB_rect = { .x1 = sarea->planeB_x,
+ .x2 = sarea->planeB_x + sarea->planeB_w,
+ .y1 = sarea->planeB_y,
+ .y2 = sarea->planeB_y + sarea->planeB_h };
+ GLint areaA = driIntersectArea( drw_rect, planeA_rect );
+ GLint areaB = driIntersectArea( drw_rect, planeB_rect );
GLuint flags = intel->vblank_flags;
if (areaB > areaA || (areaA == areaB && areaB > 0)) {
diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h
index 3b50107d73..914533d11b 100644
--- a/src/mesa/drivers/dri/i915/intel_context.h
+++ b/src/mesa/drivers/dri/i915/intel_context.h
@@ -112,6 +112,7 @@ struct intel_context
void (*update_texture_state)( intelContextPtr intel );
void (*render_start)( intelContextPtr intel );
+ void (*render_prevalidate) (struct intel_context * intel);
void (*set_color_region)( intelContextPtr intel, const intelRegion *reg );
void (*set_z_region)( intelContextPtr intel, const intelRegion *reg );
void (*update_color_z_regions)(intelContextPtr intel,
diff --git a/src/mesa/drivers/dri/i915/intel_ioctl.c b/src/mesa/drivers/dri/i915/intel_ioctl.c
index ede3b6378f..ddd92782db 100644
--- a/src/mesa/drivers/dri/i915/intel_ioctl.c
+++ b/src/mesa/drivers/dri/i915/intel_ioctl.c
@@ -53,6 +53,10 @@ u_int32_t intelGetLastFrame (intelContextPtr intel)
return frame;
}
+/**
+ * Emits a marker in the command stream, numbered from 0x00000001 to
+ * 0x7fffffff.
+ */
int intelEmitIrqLocked( intelContextPtr intel )
{
drmI830IrqEmit ie;
@@ -61,6 +65,10 @@ int intelEmitIrqLocked( intelContextPtr intel )
assert(((*(int *)intel->driHwLock) & ~DRM_LOCK_CONT) ==
(DRM_LOCK_HELD|intel->hHWContext));
+ /* Valgrind can't tell that the kernel will have copyout()ed onto this
+ * value, so initialize it now to prevent false positives.
+ */
+ seq = 0;
ie.irq_seq = &seq;
ret = drmCommandWriteRead( intel->driFd, DRM_I830_IRQ_EMIT,
@@ -76,6 +84,7 @@ int intelEmitIrqLocked( intelContextPtr intel )
return seq;
}
+/** Blocks on a marker returned by intelEitIrqLocked(). */
void intelWaitIrq( intelContextPtr intel, int seq )
{
int ret;
diff --git a/src/mesa/drivers/dri/i915/intel_pixel.c b/src/mesa/drivers/dri/i915/intel_pixel.c
index d175870a0c..c3030d42b0 100644
--- a/src/mesa/drivers/dri/i915/intel_pixel.c
+++ b/src/mesa/drivers/dri/i915/intel_pixel.c
@@ -450,10 +450,16 @@ intelDrawPixels( GLcontext *ctx,
* wise happily run the fragment program on each pixel in the image).
*/
struct gl_fragment_program *fpSave = ctx->FragmentProgram._Current;
+ /* can't just set current frag prog to 0 here as on buffer resize
+ we'll get new state checks which will segfault. Remains a hack. */
ctx->FragmentProgram._Current = NULL;
+ ctx->FragmentProgram._UseTexEnvProgram = GL_FALSE;
+ ctx->FragmentProgram._Active = GL_FALSE;
_swrast_DrawPixels( ctx, x, y, width, height, format, type,
unpack, pixels );
ctx->FragmentProgram._Current = fpSave;
+ ctx->FragmentProgram._UseTexEnvProgram = GL_TRUE;
+ ctx->FragmentProgram._Active = GL_TRUE;
}
else {
_swrast_DrawPixels( ctx, x, y, width, height, format, type,
diff --git a/src/mesa/drivers/dri/i915/intel_render.c b/src/mesa/drivers/dri/i915/intel_render.c
index d9438ba0fd..7bc02ba807 100644
--- a/src/mesa/drivers/dri/i915/intel_render.c
+++ b/src/mesa/drivers/dri/i915/intel_render.c
@@ -199,6 +199,8 @@ static GLboolean intel_run_render( GLcontext *ctx,
struct vertex_buffer *VB = &tnl->vb;
GLuint i;
+ intel->vtbl.render_prevalidate( intel );
+
/* Don't handle clipping or indexed vertices.
*/
if (intel->RenderIndex != 0 ||
diff --git a/src/mesa/drivers/dri/i915/intel_tex.c b/src/mesa/drivers/dri/i915/intel_tex.c
index 5bd280652a..978945f26b 100644
--- a/src/mesa/drivers/dri/i915/intel_tex.c
+++ b/src/mesa/drivers/dri/i915/intel_tex.c
@@ -643,17 +643,19 @@ static void intelUploadTexImage( intelContextPtr intel,
switch (image->InternalFormat) {
case GL_COMPRESSED_RGB_FXT1_3DFX:
case GL_COMPRESSED_RGBA_FXT1_3DFX:
+ row_len = ((image->Width + 7) & ~7) * 2;
+ break;
case GL_RGB_S3TC:
case GL_RGB4_S3TC:
case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
- row_len = (image->Width * 2 + 7) & ~7;
+ row_len = ((image->Width + 3) & ~3) * 2;
break;
case GL_RGBA_S3TC:
case GL_RGBA4_S3TC:
case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
- row_len = (image->Width * 4 + 15) & ~15;
+ row_len = ((image->Width + 3) & ~3) * 4;
break;
default:
fprintf(stderr,"Internal Compressed format not supported %d\n", image->InternalFormat);
diff --git a/src/mesa/drivers/dri/i915/server/i830_common.h b/src/mesa/drivers/dri/i915/server/i830_common.h
index fb6ceaa52d..2962ecc68a 100644
--- a/src/mesa/drivers/dri/i915/server/i830_common.h
+++ b/src/mesa/drivers/dri/i915/server/i830_common.h
@@ -119,14 +119,14 @@ typedef struct {
unsigned int rotated_tiled;
unsigned int rotated2_tiled;
- int pipeA_x;
- int pipeA_y;
- int pipeA_w;
- int pipeA_h;
- int pipeB_x;
- int pipeB_y;
- int pipeB_w;
- int pipeB_h;
+ int planeA_x;
+ int planeA_y;
+ int planeA_w;
+ int planeA_h;
+ int planeB_x;
+ int planeB_y;
+ int planeB_w;
+ int planeB_h;
} drmI830Sarea;
/* Flags for perf_boxes
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-25 16:39:47 +0000