Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-12-14 | intel: Don't steal renderbuffer from caller in intel_miptree_create_for_region | Pierre Willenbrock | |
Fixes double-frees of some regions, once from the renderbuffer code and once from the miptree itself. Bug #19062 | |||
2008-12-12 | intel: check for null texture. (fix #13902) | Xiang, Haihao | |
2008-09-18 | mesa: added "main/" prefix to includes, remove some -I paths from ↵ | Brian Paul | |
Makefile.template | |||
2008-09-12 | intel: Add a width field to regions, and use it for making miptrees in TFP. | Eric Anholt | |
Otherwise, we would use the pitch as width of the texture, and compiz would render the pitch padding on the right hand side. | |||
2008-08-18 | fix byte vs. pixel offset bug for 3D textures (see bug 17170) | Henri Verbeet | |
2008-07-18 | intel: fix texture border issue. (bug #16697) | Xiang, Haihao | |
2008-04-30 | intel: test cpp to ensure mipmap tree matches texture image. | Xiang, Haihao | |
2008-03-18 | [intel] Clarify miptree layout by using byte offsets to images. | Eric Anholt | |
2008-03-17 | intel: fix the error in commit 7ed1fd5d8438e55fe24091844cdfccb0881306bc | Xiang, Haihao | |
2008-03-17 | intel: Remove an assertion from intel_miptree_create. TexImage | Xiang, Haihao | |
call with zero width/height/depth matches GL spec. | |||
2008-03-03 | [intel] Silence unused variable warning when compiling for i965. | Kristian Høgsberg | |
2008-02-28 | [intel] fix compressed image height | Zou Nan hai | |
2008-02-26 | [i915] fix texture size exceed limit case when running celestia | Zou Nan hai | |
2008-02-25 | [intel] fix random ut2004 crash on some machine, for cubemap textures, | Zou Nan hai | |
image offset is already considered when map, add it again in StoreImage may lead to wrong result and crash. | |||
2008-02-14 | Add TTM buffer object based texture from pixmap implementation. | Kristian Høgsberg | |
Currently only implemented for intel hw. | |||
2007-12-28 | Bug #13839: Fix 3D texture offset miscalculation with pixels versus bytes. | Roland Scheidegger | |
2007-12-20 | [intel] Fix and reenable (software) SGIS_generate_mipmap | Eric Anholt | |
The core problem was that _mesa_generate_mipmap was not respecting RowStride of the source image. Additionally, the intel private data associated with the images (level and face) was not being initialized for the _mesa_generate_mipmap-generated images. | |||
2007-12-18 | [Intel] Centralize mipmap pitch computations. | Keith Packard | |
mipmap pitches must account for the device alignment requirements, which used to be fairly simple; just align to a 4-byte boundary. However, to allow textures to be drawn to under TTM, they now need to be aligned to a 64-byte boundary. Placing all of the alignment constraints in a single function allows this new constraint to be applied uniformly. There was some pitch constraining code in intel_miptree_create, but that was modifying the pitch long after the miptree had been layed out, so it only served to wreck the mipmap and cause rendering errors. | |||
2007-12-16 | [i915] Fix missing symbol from 965 changes. | Eric Anholt | |
2007-12-16 | [965] Move to using shared texture management code. | Eric Anholt | |
This removes the delayed texture upload optimization from 965, in exchange for bringing us closer to PBO support. It also disables SGIS_generate_mipmap, which didn't seem to be working before anyway, according to the lodbias demo. | |||
2007-12-15 | [intel] Whitespace and comment changes to bring intel_mipmap_tree.c closer. | Eric Anholt | |
2007-12-12 | [intel] Move bufmgr back to context instead of screen, fixing glthreads. | Eric Anholt | |
Putting the bufmgr in the screen is not thread-safe since the emit_reloc changes. It also led to a significant performance hit from pthread usage for the attempted thread-safety (up to 12% of a cpu spent on refcounting protection in single-threaded 965). The motivation had been to allow multi-context bufmgr sharing in classic mode, but it wasn't worth the cost. | |||
2007-11-09 | [intel] Move over files that will be shared with 965-fbo work. | Eric Anholt | |