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authorMike Frysinger <michael.frysinger@analog.com>2007-11-15 21:15:47 +0800
committerBryan Wu <bryan.wu@analog.com>2007-11-15 21:15:47 +0800
commitb33d51877726b066699b9ee40b5f512c77bdca38 (patch)
tree219c2ccbd36e17595a8c4efd16142e1b8c219f59
parenta055b2b4de214d7c3c5382ba7e7c65d1476826b3 (diff)
Blackfin arch: fix double fault definition for BF561 core A and core B
VDSP has double fault on core a/b inverted for BF561 -- bit 11 is core a while bit 12 is core b Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
-rw-r--r--include/asm-blackfin/mach-bf561/defBF561.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h
index 66f19960844..c3c0eb13c81 100644
--- a/include/asm-blackfin/mach-bf561/defBF561.h
+++ b/include/asm-blackfin/mach-bf561/defBF561.h
@@ -881,8 +881,8 @@
#define SYSTEM_RESET 0x0007 /* Initiates a system software reset */
#define DOUBLE_FAULT_A 0x0008 /* Core A Double Fault Causes Reset */
#define DOUBLE_FAULT_B 0x0010 /* Core B Double Fault Causes Reset */
-#define SWRST_DBL_FAULT_B 0x0800 /* SWRST Core B Double Fault */
-#define SWRST_DBL_FAULT_A 0x1000 /* SWRST Core A Double Fault */
+#define SWRST_DBL_FAULT_A 0x0800 /* SWRST Core A Double Fault */
+#define SWRST_DBL_FAULT_B 0x1000 /* SWRST Core B Double Fault */
#define SWRST_WDT_B 0x2000 /* SWRST Watchdog B */
#define SWRST_WDT_A 0x4000 /* SWRST Watchdog A */
#define SWRST_OCCURRED 0x8000 /* SWRST Status */