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authorLi Yang <leoli@freescale.com>2007-05-23 13:58:17 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-23 20:14:15 -0700
commit40acc095302aee380491df5f58d98945243468ec (patch)
tree51ca963c899f744f5b947b66ba76ba618b66ecb3
parent3d6ac9843175c1d29c075794519cb045b52e46c2 (diff)
ehci-fsl: fix cache coherency problem on system with large memory
The patch fixes bug http://bugzilla.kernel.org/show_bug.cgi?id=7482. It sets USB snooping on 4G space for PowerPC platforms without CONFIG_NOT_COHERENT_CACHE defined. Reported-by: Stefan Meyer <reyems@telkomsa.net> Signed-off-by: Li Yang <leoli@freescale.com> Cc: Greg KH <greg@kroah.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--drivers/usb/host/ehci-fsl.c13
-rw-r--r--drivers/usb/host/ehci-fsl.h1
2 files changed, 14 insertions, 0 deletions
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index a52480505f7..c7a7c590426 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -193,6 +193,19 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
out_be32(non_ehci + FSL_SOC_USB_CTRL, 0x00000004);
out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b);
+#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
+ /*
+ * Turn on cache snooping hardware, since some PowerPC platforms
+ * wholly rely on hardware to deal with cache coherent
+ */
+
+ /* Setup Snooping for all the 4GB space */
+ /* SNOOP1 starts from 0x0, size 2G */
+ out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
+ /* SNOOP2 starts from 0x80000000, size 2G */
+ out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
+#endif
+
if (pdata->operating_mode == FSL_USB2_DR_HOST)
mpc83xx_setup_phy(ehci, pdata->phy_mode, 0);
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index f28736a917e..b5e59db5334 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -34,4 +34,5 @@
#define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */
#define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */
#define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */
+#define SNOOP_SIZE_2GB 0x1e
#endif /* _EHCI_FSL_H */