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authorBen Dooks <ben-linux@fluff.org>2007-06-06 10:01:04 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-06-11 09:09:34 +0100
commit6c1640d52b9b7355cd777c4f08bc930ac96d905b (patch)
treee94dcd7755ee611e10fbf3655f790fcf297dac75
parent5698bd28c67775c722dc1f4ab82e0041c1c740ea (diff)
[ARM] 4445/1: ANUBIS: Fix CPLD registers
Update the ANUBIS register definitions inline with the specs and ensure they are registered correctly. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c4
-rw-r--r--include/asm-arm/arch-s3c2410/anubis-cpld.h4
-rw-r--r--include/asm-arm/arch-s3c2410/anubis-map.h10
3 files changed, 8 insertions, 10 deletions
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index b5d387ef37e..bff7ddd06a5 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -76,8 +76,8 @@ static struct map_desc anubis_iodesc[] __initdata = {
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual = (u32)ANUBIS_VA_CTRL2,
- .pfn = __phys_to_pfn(ANUBIS_PA_CTRL2),
+ .virtual = (u32)ANUBIS_VA_IDREG,
+ .pfn = __phys_to_pfn(ANUBIS_PA_IDREG),
.length = SZ_4K,
.type = MT_DEVICE,
},
diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h
index dcebf6d6190..168b93fee52 100644
--- a/include/asm-arm/arch-s3c2410/anubis-cpld.h
+++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h
@@ -18,4 +18,8 @@
#define ANUBIS_CTRL1_NANDSEL (0x3)
+/* IDREG - revision */
+
+#define ANUBIS_IDREG_REVMASK (0x7)
+
#endif /* __ASM_ARCH_ANUBISCPLD_H */
diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h
index ab076de4a0d..830d114261d 100644
--- a/include/asm-arm/arch-s3c2410/anubis-map.h
+++ b/include/asm-arm/arch-s3c2410/anubis-map.h
@@ -27,14 +27,8 @@
#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */
#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD)
-#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */
-#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD)
-
-#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */
-#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD)
-
-#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
-#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD)
+#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
+#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23))
#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)