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authorNicolas Pitre <nico@org.rmk.(none)>2005-05-12 19:27:12 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-05-12 19:27:12 +0100
commit70489c88d0b7e5820ac37a039a910bb396e2a4e3 (patch)
tree47f5ad9729469cad40c926af4961611208bdfdc1
parentd7def6c22dfa9f32b3d9e5546a7a6a90c644ff5f (diff)
[PATCH] ARM: 2680/1: refine TLS reg availability some more again
Patch from Nicolas Pitre Not all ARMv6 processors implement the TLS register. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mm/Kconfig21
1 files changed, 10 insertions, 11 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 07646d25e26..48bac7da8c7 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -412,21 +412,20 @@ config CPU_BPREDICT_DISABLE
config TLS_REG_EMUL
bool
- default y if (SMP || CPU_32v6) && (CPU_32v5 || CPU_32v4 || CPU_32v3)
+ default y if SMP && (CPU_32v5 || CPU_32v4 || CPU_32v3)
help
- We might be running on an ARMv6+ processor which should have the TLS
- register but for some reason we can't use it, or maybe an SMP system
- using a pre-ARMv6 processor (there are apparently a few prototypes
- like that in existence) and therefore access to that register must
- be emulated.
+ An SMP system using a pre-ARMv6 processor (there are apparently
+ a few prototypes like that in existence) and therefore access to
+ that required register must be emulated.
config HAS_TLS_REG
bool
- depends on CPU_32v6
- default y if !TLS_REG_EMUL
+ depends on !TLS_REG_EMUL
+ default y if SMP || CPU_32v7
help
This selects support for the CP15 thread register.
- It is defined to be available on ARMv6 or later. If a particular
- ARMv6 or later CPU doesn't support it then it must include "select
- TLS_REG_EMUL" along with its other characteristics.
+ It is defined to be available on some ARMv6 processors (including
+ all SMP capable ARMv6's) or later processors. User space may
+ assume directly accessing that register and always obtain the
+ expected value only on ARMv7 and above.