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authorIngo Molnar <mingo@elte.hu>2009-04-08 12:31:26 +0200
committerH. Peter Anvin <hpa@zytor.com>2009-05-28 09:24:11 -0700
commit711c2e481c9d1113650d09de10f61ee88ab56fda (patch)
treefec0cad6aa5f8c0884c04049e8071ff86165bab9
parenta988d334ae8213c0e0e62327222f6e5e6e52bcf1 (diff)
x86, mce: unify, prepare for 32-bit v2
Prepare the 64-bit mce_64.c code side to be built on 32-bit. [ includes ifdef relocation by Andi Kleen ] Signed-off-by: Ingo Molnar <mingo@elte.hu> Cc: Andi Kleen <ak@firstfloor.org> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.h4
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_64.c6
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce.h b/arch/x86/kernel/cpu/mcheck/mce.h
index 2d1a54bdadf..cd6cffcc2de 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.h
+++ b/arch/x86/kernel/cpu/mcheck/mce.h
@@ -1,14 +1,14 @@
#include <linux/init.h>
#include <asm/mce.h>
-#ifdef CONFIG_X86_32
-
void amd_mcheck_init(struct cpuinfo_x86 *c);
void intel_p4_mcheck_init(struct cpuinfo_x86 *c);
void intel_p5_mcheck_init(struct cpuinfo_x86 *c);
void intel_p6_mcheck_init(struct cpuinfo_x86 *c);
void winchip_mcheck_init(struct cpuinfo_x86 *c);
+#ifdef CONFIG_X86_32
+
/* Call the installed machine check handler for this CPU setup. */
extern void (*machine_check_vector)(struct pt_regs *, long error_code);
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index ce48ae75e1d..2e2c3d2e958 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -37,6 +37,10 @@
#include <asm/msr.h>
#include <asm/smp.h>
+#include "mce.h"
+
+#ifdef CONFIG_X86_64
+
#define MISC_MCELOG_MINOR 227
atomic_t mce_entry;
@@ -1241,7 +1245,7 @@ static __init int mce_init_device(void)
device_initcall(mce_init_device);
-#ifdef CONFIG_X86_32
+#else /* CONFIG_X86_32: */
int mce_disabled;