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authorRalf Baechle <ralf@linux-mips.org>2005-03-21 19:35:53 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:30:59 +0100
commit7c2740f1c1a7ff2767a92042f39edad7fad95c92 (patch)
tree3401fe3986258b7f5377f732ccac1b2f35e50583
parent4f12bfe5a498747a9a66f135a67aa8e1caa819dc (diff)
HUB interrupts are allocated per node, not per slice. Make
manipulation of the interrupt mask register atomic by disabling interrupts. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--include/asm-mips/mach-ip27/mmzone.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-mips/mach-ip27/mmzone.h b/include/asm-mips/mach-ip27/mmzone.h
index d3f566362e9..986a3b9b59a 100644
--- a/include/asm-mips/mach-ip27/mmzone.h
+++ b/include/asm-mips/mach-ip27/mmzone.h
@@ -10,7 +10,6 @@
#define LEVELS_PER_SLICE 128
struct slice_data {
- unsigned long irq_alloc_mask[2];
unsigned long irq_enable_mask[2];
int level_to_irq[LEVELS_PER_SLICE];
};
@@ -20,6 +19,7 @@ struct hub_data {
DECLARE_BITMAP(h_bigwin_used, HUB_NUM_BIG_WINDOW);
cpumask_t h_cpus;
unsigned long slice_map;
+ unsigned long irq_alloc_mask[2];
struct slice_data slice[2];
};