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authorVitaly Wool <vitalywool@gmail.com>2008-01-12 16:03:40 +0300
committerRalf Baechle <ralf@linux-mips.org>2008-01-29 10:15:01 +0000
commit9900485893c004245cbaeef050fe6ba5453a5925 (patch)
tree1f0cd8b8dd64adc1c3da4773e72064d711557490
parent8a39c520b28f1ffa528baaae6ecfaa3feb5377a5 (diff)
[MIPS] pnx8xxx: clocksource cleanups
Signed-off-by: Vitaly Wool <vitalywool@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/philips/pnx8550/common/time.c35
1 files changed, 11 insertions, 24 deletions
diff --git a/arch/mips/philips/pnx8550/common/time.c b/arch/mips/philips/pnx8550/common/time.c
index 6d494e0de3d..62f495b57f9 100644
--- a/arch/mips/philips/pnx8550/common/time.c
+++ b/arch/mips/philips/pnx8550/common/time.c
@@ -47,11 +47,6 @@ static struct clocksource pnx_clocksource = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
-static void timer_ack(void)
-{
- write_c0_compare(cpj);
-}
-
static irqreturn_t pnx8xxx_timer_interrupt(int irq, void *dev_id)
{
struct clock_event_device *c = dev_id;
@@ -94,30 +89,22 @@ static struct clock_event_device pnx8xxx_clockevent = {
.set_next_event = pnx8xxx_set_next_event,
};
-/*
- * plat_time_init() - it does the following things:
- *
- * 1) plat_time_init() -
- * a) (optional) set up RTC routines,
- * b) (optional) calibrate and set the mips_hpt_frequency
- * (only needed if you intended to use cpu counter as timer interrupt
- * source)
- */
+static inline void timer_ack(void)
+{
+ write_c0_compare(cpj);
+}
__init void plat_time_init(void)
{
- unsigned int configPR;
- unsigned int n;
- unsigned int m;
- unsigned int p;
- unsigned int pow2p;
+ unsigned int configPR;
+ unsigned int n;
+ unsigned int m;
+ unsigned int p;
+ unsigned int pow2p;
clockevents_register_device(&pnx8xxx_clockevent);
clocksource_register(&pnx_clocksource);
- setup_irq(PNX8550_INT_TIMER1, &pnx8xxx_timer_irq);
- setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction);
-
/* Timer 1 start */
configPR = read_c0_config7();
configPR &= ~0x00000008;
@@ -158,6 +145,6 @@ __init void plat_time_init(void)
write_c0_count2(0);
write_c0_compare2(0xffffffff);
+ setup_irq(PNX8550_INT_TIMER1, &pnx8xxx_timer_irq);
+ setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction);
}
-
-