diff options
author | Roger Quadros <ext-roger.quadros@nokia.com> | 2009-04-23 11:10:50 -0700 |
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committer | Tony Lindgren <tony@atomide.com> | 2009-04-23 11:10:50 -0700 |
commit | bedfd15410a331e4183d3d926bb944682cad61f3 (patch) | |
tree | 49137626e1c5bf3637db473b8ecad54b8c277939 | |
parent | c485ab50dd90412d88e25ed30b4e0d5ff636ffe2 (diff) |
ARM: OMAP3: Fixed spurious IRQ issue for GPIO interrupts
Flush posted write to IRQSTATUS register in GPIO IRQ handler.
This eliminates the below error for all peripherals that use GPIO interrupts.
<4>Spurious irq 95: 0xffffffdf, please flush posted write for irq 31
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 210a1c04555..17d7afe42b8 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -758,8 +758,12 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) /* Workaround for clearing DSP GPIO interrupts to allow retention */ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) + reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; if (cpu_is_omap24xx() || cpu_is_omap34xx()) - __raw_writel(gpio_mask, bank->base + OMAP24XX_GPIO_IRQSTATUS2); + __raw_writel(gpio_mask, reg); + + /* Flush posted write for the irq status to avoid spurious interrupts */ + __raw_readl(reg); #endif } |