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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-06-08 17:59:31 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-06-08 17:59:31 +0100
commitd782f33df706f1b8a4496b41fd7d339c6e23aa59 (patch)
treeab3241bfff98d3114f5f1337ca3885720f396276
parent1def630a6a49dda5bc89dfbd86656293640456f0 (diff)
[ARM] Fix Neponset IRQ handling
While testing the genirq code on ARM, a condition was found whereby the Neponset IRQ handler was being re-entered, causing the system to deadlock. Under the ARM IRQ code, this would not have been a visible problem because the "simple" IRQ handling had no re-entrancy protection. Resolve this by acknowledging the parent interrupt after we mask it when we are going to handle one of our "special" level-based sources (from ethernet or USAR chip.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-sa1100/neponset.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 9e02bc3712a..af6d2775cf8 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -59,6 +59,14 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
if (irr & (IRR_ETHERNET | IRR_USAR)) {
desc->chip->mask(irq);
+ /*
+ * Ack the interrupt now to prevent re-entering
+ * this neponset handler. Again, this is safe
+ * since we'll check the IRR register prior to
+ * leaving.
+ */
+ desc->chip->ack(irq);
+
if (irr & IRR_ETHERNET) {
d = irq_desc + IRQ_NEPONSET_SMC9196;
desc_handle_irq(IRQ_NEPONSET_SMC9196, d, regs);