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authorMike Habeck <habeck@sgi.com>2005-03-25 19:34:00 -0700
committerTony Luck <tony.luck@intel.com>2005-05-03 13:36:09 -0700
commitde7548d0e202263bb6bfd7574a7889e85a691937 (patch)
treeeee071a29e77fbfacc5dc6ff8c9c10d9dcc23f02
parentbb0fc085457cf6a865b8232b0cefab3a7819df44 (diff)
[IA64-SGI] Altix only: Fix for sn_dma_flush
The following patch fixes a bug in the SGI Altix sn_dma_flush code. sn_dma_flush is broken in 2.6. The code isn't waiting for the DMA data to be flushed out of the PIC ASIC. This patch is based off the linux-ia64-test-2.6.12 tree Signed-off-by: Mike Habeck <habeck@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_dma.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
index c90685985d8..64af2b2c178 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
@@ -301,7 +301,7 @@ void sn_dma_flush(uint64_t addr)
spin_lock_irqsave(&((struct sn_flush_device_list *)p)->
sfdl_flush_lock, flags);
- p->sfdl_flush_value = 0;
+ *p->sfdl_flush_addr = 0;
/* force an interrupt. */
*(volatile uint32_t *)(p->sfdl_force_int_addr) = 1;