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author | Mohan Kumar M <mohan@in.ibm.com> | 2006-11-17 17:42:24 +0530 |
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committer | Paul Mackerras <paulus@samba.org> | 2006-12-04 20:41:22 +1100 |
commit | a5715d6dfc85e002bfad68bb2858cf5a248e2060 (patch) | |
tree | b3976f51fa51de75a44022b31e17ac98e051f99d /Documentation/arm | |
parent | 11faa658c668030759d4aea6a273b7ac9a0b4746 (diff) |
[POWERPC] pSeries/kexec: Fix for interrupt distribution
This allows any secondary CPU thread also to become boot cpu for
POWER5. The patch is required to solve kdump boot issue when the
kdump kernel is booted with parameter "maxcpus=1". XICS init code
tries to match the current boot cpu id with "reg" property in each CPU
node in the device tree. But CPU node is created only for primary
thread CPU ids and "reg" property only reflects primary CPU ids. So
when a kernel is booted on a secondary cpu thread above condition will
never meet and the default distribution server is left as zero. This
leads to route the interrupts to CPU 0, but which is not online at
this time.
We use ibm,ppc-interrupt-server#s to check for both primary and
secondary CPU ids. Accordingly default distribution server value is
initialized from "ibm,ppc-interrupt-gserver#s" property. We loop
through ibm,ppc-interrupt-gserver#s property to find the global
distribution server from the last entry that matches with boot cpuid.
Signed-off-by: Mohan Kumar M <mohan@in.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'Documentation/arm')
0 files changed, 0 insertions, 0 deletions