diff options
author | Paul Mackerras <paulus@samba.org> | 2008-09-21 18:18:21 -0500 |
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committer | Paul Mackerras <paulus@samba.org> | 2008-09-21 18:18:21 -0500 |
commit | 1afb7f809bfb8fad9eec9419f3dfd75cee746ebd (patch) | |
tree | e97dbe577f68a3a619a4e8e24325423f8aef0c08 /Documentation/powerpc | |
parent | ff4be78bb70f5e8381fa68b374a506fecc17d833 (diff) | |
parent | 8b05cefca73bfbd98c89f16327f5d7da52ab7c3c (diff) |
Merge branch 'powerpc-next' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc
Diffstat (limited to 'Documentation/powerpc')
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/ssi.txt | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/ssi.txt b/Documentation/powerpc/dts-bindings/fsl/ssi.txt index d100555d488..5d9841303ca 100644 --- a/Documentation/powerpc/dts-bindings/fsl/ssi.txt +++ b/Documentation/powerpc/dts-bindings/fsl/ssi.txt @@ -24,6 +24,12 @@ Required properties: "rj-master" - r.j., SSI is clock master "ac97-slave" - AC97 mode, SSI is clock slave "ac97-master" - AC97 mode, SSI is clock master +- fsl,playback-dma: phandle to a DMA node for the DMA channel to use for + playback of audio. This is typically dictated by SOC + design. See the notes below. +- fsl,capture-dma: phandle to a DMA node for the DMA channel to use for + capture (recording) of audio. This is typically dictated + by SOC design. See the notes below. Optional properties: - codec-handle : phandle to a 'codec' node that defines an audio @@ -36,3 +42,12 @@ Child 'codec' node required properties: Child 'codec' node optional properties: - clock-frequency : The frequency of the input clock, which typically comes from an on-board dedicated oscillator. + +Notes on fsl,playback-dma and fsl,capture-dma: + +On SOCs that have an SSI, specific DMA channels are hard-wired for playback +and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for +playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for +playback and DMA channel 3 for capture. The developer can choose which +DMA controller to use, but the channels themselves are hard-wired. The +purpose of these two properties is to represent this hardware design. |