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authorZhenyu Wang <zhenyuw@linux.intel.com>2009-09-02 10:57:52 +0800
committerEric Anholt <eric@anholt.net>2009-09-04 13:05:44 -0700
commit553bd149bb2de7848b2b84642876f27202421368 (patch)
treee74d910f9937d61c3128526ad10a8f61ba2649fa /Documentation/trace
parent65655d4ab72456c4c3e503fead55fabf8211a79d (diff)
drm/i915: fix tiling on IGDNG
It seems that on IGDNG the same swizzling setup always applys. And front buffer tiling needs to set address swizzle in display arb control too. Fix plane tricle feed setting in v1 which should be disable bit, and always setup address swizzle to let hardware care for buffer tiling in all cases. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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