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| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 15:01:05 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 15:01:05 -0700 |
| commit | f6e6e883730aff2718610d3eba7608fcf73328ed (patch) | |
| tree | ec595db5e2454ac5f505a2ce971e45d674f8d6b3 /arch/arm/kernel | |
| parent | ba262e4a4d4c23b5e6c15dbb3a99696b562e8035 (diff) | |
| parent | f964c303fe33b0d2ee563349bc8bea4d57d7a265 (diff) | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 3657/1: S3C24XX: Documentation update of Overview.txt
[ARM] Update mach-types
[ARM] 3656/1: S3C2412: Add S3C2412 and S3C2413 documenation
[ARM] 3654/1: add ajeco 1arm sbc support
[ARM] fix drivers/mfd/ucb1x00-core.c IRQ probing bug
[ARM] 3651/1: S3C24XX: Make arch list more detailed
[ARM] 3650/1: S3C2412: Update s3c2410_defconfig
[ARM] 3649/1: S3C24XX: Fix capitalisation of CPU on SMDK2440
[ARM] 3612/1: make pci bus optional for ixp4xx platform
[ARM] Remove MODE_(SVC|IRQ|FIQ|USR) and DEFAULT_FIQ
[ARM] Remove save_lr/restore_pc macros
[ARM] Remove partial non-v6 binutils compatibility
[ARM] Remove LOADREGS macro
[ARM] Remove RETINSTR macro
Diffstat (limited to 'arch/arm/kernel')
| -rw-r--r-- | arch/arm/kernel/entry-common.S | 2 | ||||
| -rw-r--r-- | arch/arm/kernel/head-nommu.S | 2 | ||||
| -rw-r--r-- | arch/arm/kernel/head.S | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index b5bcebca1cd..75af6d6e2f2 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -340,7 +340,7 @@ sys_mmap2: streq r5, [sp, #4] beq do_mmap2 mov r0, #-EINVAL - RETINSTR(mov,pc, lr) + mov pc, lr #else str r5, [sp, #4] b do_mmap2 diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index adf62e5eaad..2af7e44218a 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S @@ -39,7 +39,7 @@ __INIT .type stext, %function ENTRY(stext) - msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode @ and irqs disabled mrc p15, 0, r9, c0, c0 @ get processor id bl __lookup_processor_type @ r5=procinfo r9=cpuid diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 04f7344e356..330b9476c39 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -71,7 +71,7 @@ __INIT .type stext, %function ENTRY(stext) - msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode @ and irqs disabled mrc p15, 0, r9, c0, c0 @ get processor id bl __lookup_processor_type @ r5=procinfo r9=cpuid @@ -104,7 +104,7 @@ ENTRY(secondary_startup) * the processor type - there is no need to check the machine type * as it has already been validated by the primary processor. */ - msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE mrc p15, 0, r9, c0, c0 @ get processor id bl __lookup_processor_type movs r10, r5 @ invalid processor? |