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| author | Ingo Molnar <mingo@elte.hu> | 2009-06-07 12:22:15 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-06-07 12:22:15 +0200 |
| commit | 5f4457a4f62cc9d78e04c0eb12ff0540899aad89 (patch) | |
| tree | 0b973d527ea6b2ae31e08da0746b4965a3c5a6d8 /arch/arm/mach-mv78xx0/include/mach/bridge-regs.h | |
| parent | 9b94b3a19b13e094c10f65f24bc358f6ffe4eacd (diff) | |
| parent | b87297fb405ef13cac375f202d114323b076a56d (diff) | |
Merge branch 'linus' into x86/cpu
Diffstat (limited to 'arch/arm/mach-mv78xx0/include/mach/bridge-regs.h')
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/bridge-regs.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h new file mode 100644 index 00000000000..2d14c4fe294 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h @@ -0,0 +1,39 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/bridge-regs.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_BRIDGE_REGS_H +#define __ASM_ARCH_BRIDGE_REGS_H + +#include <mach/mv78xx0.h> + +#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) +#define L2_WRITETHROUGH 0x00020000 + +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) +#define SOFT_RESET_OUT_EN 0x00000004 + +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) +#define SOFT_RESET 0x00000001 + +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) +#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) +#define BRIDGE_INT_TIMER0 0x0002 +#define BRIDGE_INT_TIMER1 0x0004 +#define BRIDGE_INT_TIMER1_CLR (~0x0004) + +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) +#define IRQ_CAUSE_ERR_OFF 0x0000 +#define IRQ_CAUSE_LOW_OFF 0x0004 +#define IRQ_CAUSE_HIGH_OFF 0x0008 +#define IRQ_MASK_ERR_OFF 0x000c +#define IRQ_MASK_LOW_OFF 0x0010 +#define IRQ_MASK_HIGH_OFF 0x0014 + +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) + +#endif |