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author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-02-25 14:01:49 +0100 |
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committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-02-25 14:01:49 +0100 |
commit | 9b1489e989695c4d502865f8bec616c0f17e99ab (patch) | |
tree | 9f90bcc7491bec06db0463d5f24f1ac19b8becc4 /arch/arm/mach-mx5/cpu.c | |
parent | bac3fcfad565c9bbceeed8b607f140c29df97355 (diff) | |
parent | 08268b78d6f0c659dc1d86453c57b336f6f4f9ae (diff) |
Merge branch 'mxc-master' of git://git.pengutronix.de/git/imx/linux-2.6 into imx/master
Removed selection of COMMON_CLKDEV by CONFIG_ARCH_MX5. This is handled
in 03e09cd8902717b66f940357257d8ad76114d9f2.
arch/arm/plat-mxc/iomux-mx1-mx2.c was moved to
arch/arm/plat-mxc/iomux-v1.c in 5e2e95f520538e095d10456acd28d9107317aa32
and got bug fixed in 5c17ef878fa25e04b1e8f1d8f5fa8b267753472c. The bug
in arch/arm/plat-mxc/iomux-v1.c isn't present any more since
bac3fcfad565c9bbceeed8b607f140c29df97355, so
arch/arm/plat-mxc/iomux-mx1-mx2.c is simply deleted.
Conflicts:
arch/arm/plat-mxc/Kconfig
arch/arm/plat-mxc/Makefile
arch/arm/plat-mxc/iomux-mx1-mx2.c
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5/cpu.c')
-rw-r--r-- | arch/arm/mach-mx5/cpu.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c new file mode 100644 index 00000000000..41c769f08c4 --- /dev/null +++ b/arch/arm/mach-mx5/cpu.c @@ -0,0 +1,47 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + * This file contains the CPU initialization code. + */ + +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <mach/hardware.h> +#include <asm/io.h> + +static int __init post_cpu_init(void) +{ + unsigned int reg; + void __iomem *base; + + if (!cpu_is_mx51()) + return 0; + + base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR); + __raw_writel(0x0, base + 0x40); + __raw_writel(0x0, base + 0x44); + __raw_writel(0x0, base + 0x48); + __raw_writel(0x0, base + 0x4C); + reg = __raw_readl(base + 0x50) & 0x00FFFFFF; + __raw_writel(reg, base + 0x50); + + base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR); + __raw_writel(0x0, base + 0x40); + __raw_writel(0x0, base + 0x44); + __raw_writel(0x0, base + 0x48); + __raw_writel(0x0, base + 0x4C); + reg = __raw_readl(base + 0x50) & 0x00FFFFFF; + __raw_writel(reg, base + 0x50); + + return 0; +} + +postcore_initcall(post_cpu_init); |