diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-08 08:15:29 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-08 08:15:29 -0800 |
commit | 1c496784a0d317535f846ddb2c93a08ba936266b (patch) | |
tree | 6d0225860032f263b6d95a3e55c364a1a5f55ec1 /arch/arm/mach-omap2/id.c | |
parent | adf9904dc774f23f04a5425f0198483ea61f878b (diff) | |
parent | 9a01609e1885b827b979d6d9dd86f43208a9e5fc (diff) |
Merge branch 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (149 commits)
arm: omap: Add omap3_defconfig
AM35xx: Defconfig for AM3517 EVM board
AM35xx: Add support for AM3517 EVM board
omap: 3630sdp: defconfig creation
omap: 3630sdp: introduce 3630 sdp board support
omap3: Add defconfig for IGEP v2 board
omap3: Add minimal IGEP v2 support
omap3: Add CompuLab CM-T35 defconfig
omap3: Add CompuLab CM-T35 board support
omap3: rx51: Add wl1251 wlan driver support
omap3: rx51: Add SDRAM init
omap1: Add default kernel configuration for Herald
omap1: Add board support and LCD for HTC Herald
omap: zoom2: update defconfig for LL_DEBUG_NONE
omap: zoom3: defconfig creation
omap3: zoom: Introduce zoom3 board support
omap3: zoom: Drop i2c-1 speed to 2400
omap3: zoom: rename zoom2 name to generic zoom
omap3: zoom: split board file for software reuse
omap3evm: MIgrate to smsc911x ethernet driver
...
Fix trivial conflict (two unrelated config options added next to each
other) in arch/arm/mach-omap2/Makefile
Diffstat (limited to 'arch/arm/mach-omap2/id.c')
-rw-r--r-- | arch/arm/mach-omap2/id.c | 165 |
1 files changed, 140 insertions, 25 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index a98201cc265..f48a4b2654d 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -21,13 +21,14 @@ #include <asm/cputype.h> -#include <mach/common.h> -#include <mach/control.h> -#include <mach/cpu.h> +#include <plat/common.h> +#include <plat/control.h> +#include <plat/cpu.h> static struct omap_chip_id omap_chip; static unsigned int omap_revision; +u32 omap3_features; unsigned int omap_rev(void) { @@ -52,11 +53,11 @@ int omap_type(void) { u32 val = 0; - if (cpu_is_omap24xx()) + if (cpu_is_omap24xx()) { val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); - else if (cpu_is_omap34xx()) + } else if (cpu_is_omap34xx()) { val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); - else { + } else { pr_err("Cannot detect omap type!\n"); goto out; } @@ -155,12 +156,37 @@ void __init omap24xx_check_revision(void) pr_info("\n"); } -void __init omap34xx_check_revision(void) +#define OMAP3_CHECK_FEATURE(status,feat) \ + if (((status & OMAP3_ ##feat## _MASK) \ + >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \ + omap3_features |= OMAP3_HAS_ ##feat; \ + } + +void __init omap3_check_features(void) +{ + u32 status; + + omap3_features = 0; + + status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS); + + OMAP3_CHECK_FEATURE(status, L2CACHE); + OMAP3_CHECK_FEATURE(status, IVA); + OMAP3_CHECK_FEATURE(status, SGX); + OMAP3_CHECK_FEATURE(status, NEON); + OMAP3_CHECK_FEATURE(status, ISP); + + /* + * TODO: Get additional info (where applicable) + * e.g. Size of L2 cache. + */ +} + +void __init omap3_check_revision(void) { u32 cpuid, idcode; u16 hawkeye; u8 rev; - char *rev_name = "ES1.0"; /* * We cannot access revision registers on ES1.0. @@ -170,7 +196,7 @@ void __init omap34xx_check_revision(void) cpuid = read_cpuid(CPUID_ID); if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { omap_revision = OMAP3430_REV_ES1_0; - goto out; + return; } /* @@ -183,33 +209,115 @@ void __init omap34xx_check_revision(void) hawkeye = (idcode >> 12) & 0xffff; rev = (idcode >> 28) & 0xff; - if (hawkeye == 0xb7ae) { + switch (hawkeye) { + case 0xb7ae: + /* Handle 34xx/35xx devices */ switch (rev) { - case 0: + case 0: /* Take care of early samples */ + case 1: omap_revision = OMAP3430_REV_ES2_0; - rev_name = "ES2.0"; break; case 2: omap_revision = OMAP3430_REV_ES2_1; - rev_name = "ES2.1"; break; case 3: omap_revision = OMAP3430_REV_ES3_0; - rev_name = "ES3.0"; break; case 4: - omap_revision = OMAP3430_REV_ES3_1; - rev_name = "ES3.1"; - break; + /* FALLTHROUGH */ default: /* Use the latest known revision as default */ omap_revision = OMAP3430_REV_ES3_1; - rev_name = "Unknown revision\n"; } + break; + case 0xb868: + /* Handle OMAP35xx/AM35xx devices + * + * Set the device to be OMAP3505 here. Actual device + * is identified later based on the features. + */ + omap_revision = OMAP3505_REV(rev); + break; + case 0xb891: + /* FALLTHROUGH */ + default: + /* Unknown default to latest silicon rev as default*/ + omap_revision = OMAP3630_REV_ES1_0; } +} -out: - pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name); +#define OMAP3_SHOW_FEATURE(feat) \ + if (omap3_has_ ##feat()) \ + printk(#feat" "); + +void __init omap3_cpuinfo(void) +{ + u8 rev = GET_OMAP_REVISION(); + char cpu_name[16], cpu_rev[16]; + + /* OMAP3430 and OMAP3530 are assumed to be same. + * + * OMAP3525, OMAP3515 and OMAP3503 can be detected only based + * on available features. Upon detection, update the CPU id + * and CPU class bits. + */ + if (cpu_is_omap3630()) { + strcpy(cpu_name, "OMAP3630"); + } else if (cpu_is_omap3505()) { + /* + * AM35xx devices + */ + if (omap3_has_sgx()) { + omap_revision = OMAP3517_REV(rev); + strcpy(cpu_name, "AM3517"); + } else { + /* Already set in omap3_check_revision() */ + strcpy(cpu_name, "AM3505"); + } + } else if (omap3_has_iva() && omap3_has_sgx()) { + /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ + strcpy(cpu_name, "OMAP3430/3530"); + } else if (omap3_has_sgx()) { + omap_revision = OMAP3525_REV(rev); + strcpy(cpu_name, "OMAP3525"); + } else if (omap3_has_iva()) { + omap_revision = OMAP3515_REV(rev); + strcpy(cpu_name, "OMAP3515"); + } else { + omap_revision = OMAP3503_REV(rev); + strcpy(cpu_name, "OMAP3503"); + } + + switch (rev) { + case OMAP_REVBITS_00: + strcpy(cpu_rev, "1.0"); + break; + case OMAP_REVBITS_10: + strcpy(cpu_rev, "2.0"); + break; + case OMAP_REVBITS_20: + strcpy(cpu_rev, "2.1"); + break; + case OMAP_REVBITS_30: + strcpy(cpu_rev, "3.0"); + break; + case OMAP_REVBITS_40: + /* FALLTHROUGH */ + default: + /* Use the latest known revision as default */ + strcpy(cpu_rev, "3.1"); + } + + /* Print verbose information */ + pr_info("%s ES%s (", cpu_name, cpu_rev); + + OMAP3_SHOW_FEATURE(l2cache); + OMAP3_SHOW_FEATURE(iva); + OMAP3_SHOW_FEATURE(sgx); + OMAP3_SHOW_FEATURE(neon); + OMAP3_SHOW_FEATURE(isp); + + printk(")\n"); } /* @@ -221,15 +329,18 @@ void __init omap2_check_revision(void) * At this point we have an idea about the processor revision set * earlier with omap2_set_globals_tap(). */ - if (cpu_is_omap24xx()) + if (cpu_is_omap24xx()) { omap24xx_check_revision(); - else if (cpu_is_omap34xx()) - omap34xx_check_revision(); - else if (cpu_is_omap44xx()) { + } else if (cpu_is_omap34xx()) { + omap3_check_revision(); + omap3_check_features(); + omap3_cpuinfo(); + } else if (cpu_is_omap44xx()) { printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n"); return; - } else + } else { pr_err("OMAP revision unknown, please fix!\n"); + } /* * OK, now we know the exact revision. Initialize omap_chip bits @@ -241,6 +352,8 @@ void __init omap2_check_revision(void) } else if (cpu_is_omap242x()) { /* Currently only supports 2420ES2.1.1 and 2420-all */ omap_chip.oc |= CHIP_IS_OMAP2420; + } else if (cpu_is_omap3505() || cpu_is_omap3517()) { + omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1; } else if (cpu_is_omap343x()) { omap_chip.oc = CHIP_IS_OMAP3430; if (omap_rev() == OMAP3430_REV_ES1_0) @@ -252,6 +365,8 @@ void __init omap2_check_revision(void) omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; else if (omap_rev() == OMAP3430_REV_ES3_1) omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; + else if (omap_rev() == OMAP3630_REV_ES1_0) + omap_chip.oc |= CHIP_IS_OMAP3630ES1; } else { pr_err("Uninitialized omap_chip, please fix!\n"); } |