diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 14:06:51 +0100 |
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committer | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 14:12:19 +0100 |
commit | ff347a0f3fb3ef5a5af60606b571a3101bc9a631 (patch) | |
tree | f71a7606f604368094b7bb019257d8bca8860504 /arch/arm/mach-s3c6410 | |
parent | d1ed491ddcc114ec6c07a9277403d17839ee2805 (diff) |
[ARM] S3C64XX: Add VIC0 and VIC1 sourced interripts
Add and initialise the two VIC (PL192) found on
the S3C64XX series CPUs.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c6410')
-rw-r--r-- | arch/arm/mach-s3c6410/cpu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c6410/cpu.c index fbca763fa48..c3e317c1650 100644 --- a/arch/arm/mach-s3c6410/cpu.c +++ b/arch/arm/mach-s3c6410/cpu.c @@ -58,6 +58,12 @@ void __init s3c6410_init_clocks(int xtal) s3c24xx_register_baseclocks(xtal); } +void __init s3c6410_init_irq(void) +{ + /* VIC0 is missing IRQ7, VIC1 is fully populated. */ + s3c64xx_init_irq(~0 & ~(1 << 7), ~0); +} + struct sysdev_class s3c6410_sysclass = { .name = "s3c6410-core", }; |