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authorStanislav Samsonov <samsonov@marvell.com>2008-06-22 22:45:10 +0200
committerLennert Buytenhek <buytenh@marvell.com>2008-06-22 22:45:10 +0200
commit794d15b25df5dda10efba600d6dd6cd74a7aa9cb (patch)
tree10797e90295895994ea3f2363e84e555e40abb97 /arch/arm/mm
parenta9311cfed241ebcd6b5f9be5c8c6d519bf22f9e7 (diff)
[ARM] add Marvell 78xx0 ARM SoC support
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring (depending on the model) one or two Feroceon CPU cores with 512K of L2 cache and VFP coprocessors running at (depending on the model) between 800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe interfaces that can each run either in x4 or quad x1 mode, three USB 2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI interface, four UARTs, and depending on the model, two or four gigabit ethernet interfaces. This patch adds basic support for the platform, and allows booting on the MV78x00 development board, with functional UARTs, SATA, PCIe, GigE and USB ports. Signed-off-by: Stanislav Samsonov <samsonov@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/Kconfig4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index a7a6efec897..236603bbafd 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -365,7 +365,7 @@ config CPU_XSC3
# Feroceon
config CPU_FEROCEON
bool
- depends on ARCH_ORION5X || ARCH_LOKI || ARCH_KIRKWOOD
+ depends on ARCH_ORION5X || ARCH_LOKI || ARCH_KIRKWOOD || ARCH_MV78XX0
default y
select CPU_32v5
select CPU_ABRT_EV5T
@@ -716,7 +716,7 @@ config OUTER_CACHE
config CACHE_FEROCEON_L2
bool "Enable the Feroceon L2 cache controller"
- depends on ARCH_KIRKWOOD
+ depends on ARCH_KIRKWOOD || ARCH_MV78XX0
default y
select OUTER_CACHE
help