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authorBalaji T K <balajitk@ti.com>2009-12-14 00:25:31 +0100
committerSamuel Ortiz <sameo@linux.intel.com>2009-12-14 00:25:31 +0100
commite8deb28ca8e221de0239eafb3c3d431d8854278e (patch)
tree2dffdb207366aa0a8f229775515fc207c16f8574 /arch/arm
parentc4aa6f314328142974c78377cd9476f8ec6f0eba (diff)
mfd: Add support for twl6030 irq framework
This patch adds support for phoenix interrupt framework. New iInterrupt status register A, B, C are introduced in Phoenix and are cleared on write. Due to the differences in interrupt handling with respect to TWL4030, twl6030-irq.c is created for TWL6030 PMIC Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index ce5dd2d1dc2..97d6c50c3dc 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -472,8 +472,22 @@
#endif
#define TWL4030_GPIO_IRQ_END (TWL4030_GPIO_IRQ_BASE + TWL4030_GPIO_NR_IRQS)
+#define TWL6030_IRQ_BASE (OMAP_FPGA_IRQ_END)
+#ifdef CONFIG_TWL4030_CORE
+#define TWL6030_BASE_NR_IRQS 20
+#else
+#define TWL6030_BASE_NR_IRQS 0
+#endif
+#define TWL6030_IRQ_END (TWL6030_IRQ_BASE + TWL6030_BASE_NR_IRQS)
+
/* Total number of interrupts depends on the enabled blocks above */
-#define NR_IRQS TWL4030_GPIO_IRQ_END
+#if (TWL4030_GPIO_IRQ_END > TWL6030_IRQ_END)
+#define TWL_IRQ_END TWL4030_GPIO_IRQ_END
+#else
+#define TWL_IRQ_END TWL6030_IRQ_END
+#endif
+
+#define NR_IRQS TWL_IRQ_END
#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))