diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2009-06-29 14:20:10 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2009-07-16 01:52:24 -0400 |
| commit | fb4b5d3a379824d94fd71fc1aa78e9dbcb15b948 (patch) | |
| tree | 104b640b09ebbc58f4eb3b67fd190bf7bf9a3912 /arch/blackfin/kernel/process.c | |
| parent | 8399a74f61c69c7d233924de3dd314ca0effa16a (diff) | |
Blackfin: handle BF561 Core B memory regions better when SMP=n
Rather than assume Core B is always run with caches turned on, let people
load into any of the on-chip memory regions. It is their business how the
SRAM/Cache regions are utilized, so don't prevent them from being able to
load into them.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/kernel/process.c')
| -rw-r--r-- | arch/blackfin/kernel/process.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c index 79cad0ac589..9da36bab7cc 100644 --- a/arch/blackfin/kernel/process.c +++ b/arch/blackfin/kernel/process.c @@ -361,7 +361,7 @@ static inline int in_mem_const(unsigned long addr, unsigned long size, unsigned long const_addr, unsigned long const_size) { - return in_mem_const_off(addr, 0, size, const_addr, const_size); + return in_mem_const_off(addr, size, 0, const_addr, const_size); } #define IN_ASYNC(bnum, bctlnum) \ ({ \ @@ -390,13 +390,13 @@ int bfin_mem_access_type(unsigned long addr, unsigned long size) if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH)) return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; #ifdef COREB_L1_CODE_START - if (in_mem_const(addr, size, COREB_L1_CODE_START, L1_CODE_LENGTH)) + if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH)) return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA; if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH)) return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT; - if (in_mem_const(addr, size, COREB_L1_DATA_A_START, L1_DATA_A_LENGTH)) + if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH)) return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; - if (in_mem_const(addr, size, COREB_L1_DATA_B_START, L1_DATA_B_LENGTH)) + if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH)) return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; #endif if (in_mem_const(addr, size, L2_START, L2_LENGTH)) @@ -472,13 +472,13 @@ int _access_ok(unsigned long addr, unsigned long size) if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH)) return 1; #ifdef COREB_L1_CODE_START - if (in_mem_const(addr, size, COREB_L1_CODE_START, L1_CODE_LENGTH)) + if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH)) return 1; if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH)) return 1; - if (in_mem_const(addr, size, COREB_L1_DATA_A_START, L1_DATA_A_LENGTH)) + if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH)) return 1; - if (in_mem_const(addr, size, COREB_L1_DATA_B_START, L1_DATA_B_LENGTH)) + if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH)) return 1; #endif if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH)) |