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authorMike Habeck <habeck@sgi.com>2006-04-26 12:05:50 -0500
committerTony Luck <tony.luck@intel.com>2006-04-27 14:32:07 -0700
commitcda3d4a069b915cf46e640bb6872a9d9aefeaabe (patch)
treef7022fceac378d444761da3f22e729d348482cf2 /arch/ia64
parent1df57c0c21c92a6d4fcfe5304c84151ed9beb7a2 (diff)
[IA64-SGI] fix SGI Altix tioce_reserve_m32() bug
The following patch fixes a bug in the SGI Altix tioce_reserve_m32() code. The bug was that we could walking past the end of the CE ASIC 32/40bit PMU ATE Buffer, resulting in a PIO Reply Error. Signed-off-by: Mike Habeck <habeck@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/sn/pci/tioce_provider.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
index fa073cc4b56..833295624e5 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -682,9 +682,6 @@ tioce_reserve_m32(struct tioce_kernel *ce_kern, u64 base, u64 limit)
int ate_index, last_ate, ps;
struct tioce *ce_mmr;
- if (!TIOCE_M32_ADDR(base))
- return;
-
ce_mmr = (struct tioce *)ce_kern->ce_common->ce_pcibus.bs_base;
ps = ce_kern->ce_ate3240_pagesize;
ate_index = ATE_PAGE(base, ps);
@@ -693,6 +690,9 @@ tioce_reserve_m32(struct tioce_kernel *ce_kern, u64 base, u64 limit)
if (ate_index < 64)
ate_index = 64;
+ if (last_ate >= TIOCE_NUM_M3240_ATES)
+ last_ate = TIOCE_NUM_M3240_ATES - 1;
+
while (ate_index <= last_ate) {
u64 ate;