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| author | Suresh Siddha <suresh.b.siddha@intel.com> | 2009-10-26 14:24:35 -0800 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-11-02 15:56:36 +0100 |
| commit | b3ec0a37a7907813bb4fb85a2d94102c152470b7 (patch) | |
| tree | aec7a1de95df7b05231f52608899ca34d48f5105 /arch/mips/ar7 | |
| parent | a5e74b841930bec78a4684ab9f208b2ddfe7c736 (diff) | |
x86: Use EOI register in io-apic on intel platforms
IO-APIC's in intel chipsets support EOI register starting from
IO-APIC version 2. Use that when ever we need to clear the
IO-APIC RTE's RemoteIRR bit explicitly.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Acked-by: Gary Hade <garyhade@us.ibm.com>
Cc: Eric W. Biederman <ebiederm@xmission.com>
LKML-Reference: <20091026230001.947855317@sbs-t61.sc.intel.com>
[ Marked use_eio_reg as __read_mostly, fixed small details ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/ar7')
0 files changed, 0 insertions, 0 deletions