diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-01-18 20:15:05 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-01-18 20:15:05 +0100 |
commit | 4092762aebfe55c1f8e31440b80a053c2dbe519b (patch) | |
tree | 8fb9fd14131194174c12daf5d8195afd3b62bc3e /arch/mips/include/asm/cpu.h | |
parent | 745b1626dd71ce9661a05ea4db57859ed5c773d2 (diff) | |
parent | 1de9e8e70f5acc441550ca75433563d91b269bbe (diff) |
Merge branch 'tracing/ftrace'; commit 'v2.6.29-rc2' into tracing/core
Diffstat (limited to 'arch/mips/include/asm/cpu.h')
-rw-r--r-- | arch/mips/include/asm/cpu.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 229a786101d..c018727c7dd 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -33,6 +33,7 @@ #define PRID_COMP_TOSHIBA 0x070000 #define PRID_COMP_LSI 0x080000 #define PRID_COMP_LEXRA 0x0b0000 +#define PRID_COMP_CAVIUM 0x0d0000 /* @@ -114,6 +115,18 @@ #define PRID_IMP_BCM3302 0x9000 /* + * These are the PRID's for when 23:16 == PRID_COMP_CAVIUM + */ + +#define PRID_IMP_CAVIUM_CN38XX 0x0000 +#define PRID_IMP_CAVIUM_CN31XX 0x0100 +#define PRID_IMP_CAVIUM_CN30XX 0x0200 +#define PRID_IMP_CAVIUM_CN58XX 0x0300 +#define PRID_IMP_CAVIUM_CN56XX 0x0400 +#define PRID_IMP_CAVIUM_CN50XX 0x0600 +#define PRID_IMP_CAVIUM_CN52XX 0x0700 + +/* * Definitions for 7:0 on legacy processors */ @@ -203,6 +216,7 @@ enum cpu_type_enum { * MIPS64 class processors */ CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2, + CPU_CAVIUM_OCTEON, CPU_LAST }; |