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authorDavid Daney <ddaney@avtrex.com>2008-09-23 00:07:16 -0700
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 16:18:56 +0100
commit654f57bfb467996fb730eae96dc30ea4de989fdc (patch)
tree20843169f98a37ffe4908486de587a5817653140 /arch/mips/kernel/cpu-probe.c
parent6aa3524c182c01b8b8b7c21c4da20c742a9b4d86 (diff)
MIPS: Probe watch registers and report configuration.
Probe for watch register characteristics, and report them in /proc/cpuinfo. Signed-off-by: David Daney <ddaney@avtrex.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index e621fda8ab3..0cf15457eca 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -21,6 +21,7 @@
#include <asm/fpu.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
+#include <asm/watch.h>
/*
* Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
@@ -677,6 +678,7 @@ static inline void spram_config(void) {}
static inline void cpu_probe_mips(struct cpuinfo_mips *c)
{
decode_configs(c);
+ mips_probe_watch_registers(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_4KC:
c->cputype = CPU_4KC;