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author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2009-09-03 22:59:00 +0900 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2009-11-02 12:00:07 +0100 |
commit | fcc152f3bf55cec61167b173774cbf717b0ff5e4 (patch) | |
tree | 7005fde7d87f7f93fa33a39f1cda3194ed94a632 /arch/mips/oprofile/op_model_loongson2.c | |
parent | 2b5b9b786c177fa4bca1646325a1dd98c4399523 (diff) |
MIPS: TXx9: Fix spi-baseclk value
TXx9 SPI bit rate is calculated by:
fBR = fSPI / 2 / (n + 1)
(fSPI is SPI master clock freq, i.e. imbusclk freq.)
So use imbus_clk / 2 as a spi-baseclk.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/oprofile/op_model_loongson2.c')
0 files changed, 0 insertions, 0 deletions