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authorRalf Baechle <ralf@linux-mips.org>2007-07-09 16:29:16 +0100
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 17:33:05 +0100
commit688b3d720820a9e3e2e9d5882be64a28f649e206 (patch)
tree7181045ae55f69966e8237439a215242e9714ff4 /arch/mips/pci/fixup-ocelot3.c
parentc99cabf034d42c9e4a9c1ed9dfd26411b2fb9b57 (diff)
[MIPS] Delete Ocelot 3 support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/fixup-ocelot3.c')
-rw-r--r--arch/mips/pci/fixup-ocelot3.c41
1 files changed, 0 insertions, 41 deletions
diff --git a/arch/mips/pci/fixup-ocelot3.c b/arch/mips/pci/fixup-ocelot3.c
deleted file mode 100644
index 702f997b867..00000000000
--- a/arch/mips/pci/fixup-ocelot3.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2004 Montavista Software Inc.
- * Author: Manish Lachwani (mlachwani@mvista.com)
- *
- * Looking at the schematics for the Ocelot-3 board, there are
- * two PCI busses and each bus has two PCI slots.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <asm/mipsregs.h>
-
-/*
- * Do platform specific device initialization at
- * pci_enable_device() time
- */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- int bus = dev->bus->number;
-
- if (bus == 0 && slot == 1)
- return 2; /* PCI-X A */
- if (bus == 0 && slot == 2)
- return 3; /* PCI-X B */
- if (bus == 1 && slot == 1)
- return 4; /* PCI A */
- if (bus == 1 && slot == 2)
- return 5; /* PCI B */
-
-return 0;
- panic("Whooops in pcibios_map_irq");
-}