diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-10 14:48:43 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-10 14:48:43 -0700 |
commit | 0f166396e7e8931bb4acfd1a6ea1bd4f0b43f1dd (patch) | |
tree | 6279fa70695a4c56b7e935018a4c0fc1dfa82e68 /arch/mips/tx4938/toshiba_rbtx4938 | |
parent | 5f60cfd932b42c69ed3226400cb5eab152576c3a (diff) | |
parent | 105b1bca4d7bed85bb296f7e7caec2fc643e9fbf (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (62 commits)
[MIPS] PNX8550: Cleanup proc code.
[MIPS] WRPPMC: Fix build.
[MIPS] Yosemite: Fix modpost warnings.
[MIPS] Change names of local variables to silence sparse
[MIPS] SB1: Fix modpost warning.
[MIPS] PNX: Fix modpost warnings.
[MIPS] Alchemy: Fix modpost warnings.
[MIPS] Non-FPAFF: Fix warning.
[MIPS] DEC: Fix modpost warning.
[MIPS] MIPSsim: Enable MIPSsim virtual network driver.
[MIPS] Delete Ocelot 3 support.
[MIPS] remove LASAT Networks platforms support
[MIPS] Early check for SMTC kernel on non-MT processor
[MIPS] Add debugfs files to show fpuemu statistics
[MIPS] Add some debugfs files to debug unaligned accesses
[MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
[MIPS] tc35815: Load MAC address via platform_device
[MIPS] Move FPU affinity code into separate file.
[MIPS] Make ioremap() work on TX39/49 special unmapped segment
[MIPS] rbtx4938: Update and minimize defconfig
...
Diffstat (limited to 'arch/mips/tx4938/toshiba_rbtx4938')
-rw-r--r-- | arch/mips/tx4938/toshiba_rbtx4938/Makefile | 2 | ||||
-rw-r--r-- | arch/mips/tx4938/toshiba_rbtx4938/irq.c | 6 | ||||
-rw-r--r-- | arch/mips/tx4938/toshiba_rbtx4938/setup.c | 306 | ||||
-rw-r--r-- | arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c | 261 | ||||
-rw-r--r-- | arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c | 164 |
5 files changed, 281 insertions, 458 deletions
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/Makefile b/arch/mips/tx4938/toshiba_rbtx4938/Makefile index 226941279d7..10c94e62bf5 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/Makefile +++ b/arch/mips/tx4938/toshiba_rbtx4938/Makefile @@ -6,4 +6,4 @@ # unless it's something special (ie not a .c file). # -obj-y += prom.o setup.o irq.o spi_eeprom.o spi_txx9.o +obj-y += prom.o setup.o irq.o spi_eeprom.o diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c index 2e96dbb248b..91aea7aff51 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c @@ -165,8 +165,6 @@ toshiba_rbtx4938_irq_ioc_disable(unsigned int irq) TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); } -extern void __init txx9_spi_irqinit(int irc_irq); - void __init arch_init_irq(void) { extern void tx4938_irq_init(void); @@ -185,9 +183,5 @@ void __init arch_init_irq(void) /* Onboard 10M Ether: High Active */ TX4938_WR(TX4938_MKA(TX4938_IRC_IRDM0), 0x00000040); - if (tx4938_ccfgptr->pcfg & TX4938_PCFG_SPI_SEL) { - txx9_spi_irqinit(RBTX4938_IRQ_IRC_SPI); - } - wbflush(); } diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c index f5d1ce739fc..6ed39a5aea7 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c @@ -14,13 +14,13 @@ #include <linux/init.h> #include <linux/types.h> #include <linux/ioport.h> -#include <linux/proc_fs.h> #include <linux/delay.h> #include <linux/interrupt.h> #include <linux/console.h> #include <linux/pci.h> #include <linux/pm.h> #include <linux/platform_device.h> +#include <linux/clk.h> #include <asm/wbflush.h> #include <asm/reboot.h> @@ -35,6 +35,9 @@ #include <linux/serial.h> #include <linux/serial_core.h> #endif +#include <linux/spi/spi.h> +#include <asm/tx4938/spi.h> +#include <asm/gpio.h> extern void rbtx4938_time_init(void) __init; extern char * __init prom_getcmdline(void); @@ -349,7 +352,7 @@ static struct pci_dev *fake_pci_dev(struct pci_controller *hose, static struct pci_dev dev; static struct pci_bus bus; - dev.sysdata = (void *)hose; + dev.sysdata = bus.sysdata = hose; dev.devfn = devfn; bus.number = busnr; bus.ops = hose->pci_ops; @@ -382,8 +385,10 @@ int txboard_pci66_check(struct pci_controller *hose, int top_bus, int current_bu printk("PCI: Checking 66MHz capabilities...\n"); for (pci_devfn=devfn_start; pci_devfn<devfn_stop; pci_devfn++) { - early_read_config_word(hose, top_bus, current_bus, pci_devfn, - PCI_VENDOR_ID, &vid); + if (early_read_config_word(hose, top_bus, current_bus, + pci_devfn, PCI_VENDOR_ID, + &vid) != PCIBIOS_SUCCESSFUL) + continue; if (vid == 0xffff) continue; @@ -460,7 +465,6 @@ static int __init tx4938_pcibios_init(void) int extarb = !(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB); PCIBIOS_MIN_IO = 0x00001000UL; - PCIBIOS_MIN_MEM = 0x01000000UL; mem_base[0] = txboard_request_phys_region_shrink(&mem_size[0]); io_base[0] = txboard_request_phys_region_shrink(&io_size[0]); @@ -574,82 +578,43 @@ arch_initcall(tx4938_pcibios_init); #define SEEPROM3_CS 1 /* IOC */ #define SRTC_CS 2 /* IOC */ -static int rbtx4938_spi_cs_func(int chipid, int on) -{ - unsigned char bit; - switch (chipid) { - case RBTX4938_SEEPROM1_CHIPID: - if (on) - tx4938_pioptr->dout &= ~(1 << SEEPROM1_CS); - else - tx4938_pioptr->dout |= (1 << SEEPROM1_CS); - return 0; - break; - case RBTX4938_SEEPROM2_CHIPID: - bit = (1 << SEEPROM2_CS); - break; - case RBTX4938_SEEPROM3_CHIPID: - bit = (1 << SEEPROM3_CS); - break; - case RBTX4938_SRTC_CHIPID: - bit = (1 << SRTC_CS); - break; - default: - return -ENODEV; - } - /* bit1,2,4 are low active, bit3 is high active */ - *rbtx4938_spics_ptr = - (*rbtx4938_spics_ptr & ~bit) | - ((on ? (bit ^ 0x0b) : ~(bit ^ 0x0b)) & bit); - return 0; -} - #ifdef CONFIG_PCI -extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len); - -int rbtx4938_get_tx4938_ethaddr(struct pci_dev *dev, unsigned char *addr) +static int __init rbtx4938_ethaddr_init(void) { - struct pci_controller *channel = (struct pci_controller *)dev->bus->sysdata; - static unsigned char dat[17]; - static int read_dat = 0; - int ch = 0; + unsigned char dat[17]; + unsigned char sum; + int i; - if (channel != &tx4938_pci_controller[1]) - return -ENODEV; - /* TX4938 PCIC1 */ - switch (PCI_SLOT(dev->devfn)) { - case TX4938_PCIC_IDSEL_AD_TO_SLOT(31): - ch = 0; - break; - case TX4938_PCIC_IDSEL_AD_TO_SLOT(30): - ch = 1; - break; - default: + /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */ + if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) { + printk(KERN_ERR "seeprom: read error.\n"); return -ENODEV; + } else { + if (strcmp(dat, "MAC") != 0) + printk(KERN_WARNING "seeprom: bad signature.\n"); + for (i = 0, sum = 0; i < sizeof(dat); i++) + sum += dat[i]; + if (sum) + printk(KERN_WARNING "seeprom: bad checksum.\n"); } - if (!read_dat) { - unsigned char sum; - int i; - read_dat = 1; - /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */ - if (spi_eeprom_read(RBTX4938_SEEPROM1_CHIPID, - 0, dat, sizeof(dat))) { - printk(KERN_ERR "seeprom: read error.\n"); - } else { - if (strcmp(dat, "MAC") != 0) - printk(KERN_WARNING "seeprom: bad signature.\n"); - for (i = 0, sum = 0; i < sizeof(dat); i++) - sum += dat[i]; - if (sum) - printk(KERN_WARNING "seeprom: bad checksum.\n"); - } + for (i = 0; i < 2; i++) { + unsigned int slot = TX4938_PCIC_IDSEL_AD_TO_SLOT(31 - i); + unsigned int id = (1 << 8) | PCI_DEVFN(slot, 0); /* bus 1 */ + struct platform_device *pdev; + if (!(tx4938_ccfgptr->pcfg & + (i ? TX4938_PCFG_ETH1_SEL : TX4938_PCFG_ETH0_SEL))) + continue; + pdev = platform_device_alloc("tc35815-mac", id); + if (!pdev || + platform_device_add_data(pdev, &dat[4 + 6 * i], 6) || + platform_device_add(pdev)) + platform_device_put(pdev); } - memcpy(addr, &dat[4 + 6 * ch], 6); return 0; } +device_initcall(rbtx4938_ethaddr_init); #endif /* CONFIG_PCI */ -extern void __init txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on)); static void __init rbtx4938_spi_setup(void) { /* set SPI_SEL */ @@ -657,7 +622,6 @@ static void __init rbtx4938_spi_setup(void) /* chip selects for SPI devices */ tx4938_pioptr->dout |= (1 << SEEPROM1_CS); tx4938_pioptr->dir |= (1 << SEEPROM1_CS); - txx9_spi_init(TX4938_SPI_REG, rbtx4938_spi_cs_func); } static struct resource rbtx4938_fpga_resource; @@ -896,10 +860,8 @@ void tx4938_report_pcic_status(void) /* We use onchip r4k counter or TMR timer as our system wide timer * interrupt running at 100HZ. */ -extern void __init rtc_rx5c348_init(int chipid); void __init rbtx4938_time_init(void) { - rtc_rx5c348_init(RBTX4938_SRTC_CHIPID); mips_hpt_frequency = txx9_cpu_clock / 2; } @@ -1016,29 +978,6 @@ void __init toshiba_rbtx4938_setup(void) *rbtx4938_dipsw_ptr, *rbtx4938_bdipsw_ptr); } -#ifdef CONFIG_PROC_FS -extern void spi_eeprom_proc_create(struct proc_dir_entry *dir, int chipid); -static int __init tx4938_spi_proc_setup(void) -{ - struct proc_dir_entry *tx4938_spi_eeprom_dir; - - tx4938_spi_eeprom_dir = proc_mkdir("spi_eeprom", 0); - - if (!tx4938_spi_eeprom_dir) - return -ENOMEM; - - /* don't allow user access to RBTX4938_SEEPROM1_CHIPID - * as it contains eth0 and eth1 MAC addresses - */ - spi_eeprom_proc_create(tx4938_spi_eeprom_dir, RBTX4938_SEEPROM2_CHIPID); - spi_eeprom_proc_create(tx4938_spi_eeprom_dir, RBTX4938_SEEPROM3_CHIPID); - - return 0; -} - -__initcall(tx4938_spi_proc_setup); -#endif - static int __init rbtx4938_ne_init(void) { struct resource res[] = { @@ -1057,3 +996,176 @@ static int __init rbtx4938_ne_init(void) return IS_ERR(dev) ? PTR_ERR(dev) : 0; } device_initcall(rbtx4938_ne_init); + +/* GPIO support */ + +static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock); + +static void rbtx4938_spi_gpio_set(unsigned gpio, int value) +{ + u8 val; + unsigned long flags; + gpio -= 16; + spin_lock_irqsave(&rbtx4938_spi_gpio_lock, flags); + val = *rbtx4938_spics_ptr; + if (value) + val |= 1 << gpio; + else + val &= ~(1 << gpio); + *rbtx4938_spics_ptr = val; + mmiowb(); + spin_unlock_irqrestore(&rbtx4938_spi_gpio_lock, flags); +} + +static int rbtx4938_spi_gpio_dir_out(unsigned gpio, int value) +{ + rbtx4938_spi_gpio_set(gpio, value); + return 0; +} + +static DEFINE_SPINLOCK(tx4938_gpio_lock); + +static int tx4938_gpio_get(unsigned gpio) +{ + return tx4938_pioptr->din & (1 << gpio); +} + +static void tx4938_gpio_set_raw(unsigned gpio, int value) +{ + u32 val; + val = tx4938_pioptr->dout; + if (value) + val |= 1 << gpio; + else + val &= ~(1 << gpio); + tx4938_pioptr->dout = val; +} + +static void tx4938_gpio_set(unsigned gpio, int value) +{ + unsigned long flags; + spin_lock_irqsave(&tx4938_gpio_lock, flags); + tx4938_gpio_set_raw(gpio, value); + mmiowb(); + spin_unlock_irqrestore(&tx4938_gpio_lock, flags); +} + +static int tx4938_gpio_dir_in(unsigned gpio) +{ + spin_lock_irq(&tx4938_gpio_lock); + tx4938_pioptr->dir &= ~(1 << gpio); + mmiowb(); + spin_unlock_irq(&tx4938_gpio_lock); + return 0; +} + +static int tx4938_gpio_dir_out(unsigned int gpio, int value) +{ + spin_lock_irq(&tx4938_gpio_lock); + tx4938_gpio_set_raw(gpio, value); + tx4938_pioptr->dir |= 1 << gpio; + mmiowb(); + spin_unlock_irq(&tx4938_gpio_lock); + return 0; +} + +int gpio_direction_input(unsigned gpio) +{ + if (gpio < 16) + return tx4938_gpio_dir_in(gpio); + return -EINVAL; +} + +int gpio_direction_output(unsigned gpio, int value) +{ + if (gpio < 16) + return tx4938_gpio_dir_out(gpio, value); + if (gpio < 16 + 3) + return rbtx4938_spi_gpio_dir_out(gpio, value); + return -EINVAL; +} + +int gpio_get_value(unsigned gpio) +{ + if (gpio < 16) + return tx4938_gpio_get(gpio); + return 0; +} + +void gpio_set_value(unsigned gpio, int value) +{ + if (gpio < 16) + tx4938_gpio_set(gpio, value); + else + rbtx4938_spi_gpio_set(gpio, value); +} + +/* SPI support */ + +static void __init txx9_spi_init(unsigned long base, int irq) +{ + struct resource res[] = { + { + .start = base, + .end = base + 0x20 - 1, + .flags = IORESOURCE_MEM, + .parent = &tx4938_reg_resource, + }, { + .start = irq, + .flags = IORESOURCE_IRQ, + }, + }; + platform_device_register_simple("txx9spi", 0, + res, ARRAY_SIZE(res)); +} + +static int __init rbtx4938_spi_init(void) +{ + struct spi_board_info srtc_info = { + .modalias = "rs5c348", + .max_speed_hz = 1000000, /* 1.0Mbps @ Vdd 2.0V */ + .bus_num = 0, + .chip_select = 16 + SRTC_CS, + /* Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS */ + .mode = SPI_MODE_1 | SPI_CS_HIGH, + }; + spi_register_board_info(&srtc_info, 1); + spi_eeprom_register(SEEPROM1_CS); + spi_eeprom_register(16 + SEEPROM2_CS); + spi_eeprom_register(16 + SEEPROM3_CS); + txx9_spi_init(TX4938_SPI_REG & 0xfffffffffULL, RBTX4938_IRQ_IRC_SPI); + return 0; +} +arch_initcall(rbtx4938_spi_init); + +/* Minimum CLK support */ + +struct clk *clk_get(struct device *dev, const char *id) +{ + if (!strcmp(id, "spi-baseclk")) + return (struct clk *)(txx9_gbus_clock / 2 / 4); + return ERR_PTR(-ENOENT); +} +EXPORT_SYMBOL(clk_get); + +int clk_enable(struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + return (unsigned long)clk; +} +EXPORT_SYMBOL(clk_get_rate); + +void clk_put(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_put); diff --git a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c b/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c index 89596e62f90..4d6b4ade5e8 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c @@ -10,209 +10,90 @@ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) */ #include <linux/init.h> -#include <linux/delay.h> -#include <linux/proc_fs.h> -#include <linux/spinlock.h> +#include <linux/device.h> +#include <linux/spi/spi.h> +#include <linux/spi/eeprom.h> #include <asm/tx4938/spi.h> -#include <asm/tx4938/tx4938.h> -/* ATMEL 250x0 instructions */ -#define ATMEL_WREN 0x06 -#define ATMEL_WRDI 0x04 -#define ATMEL_RDSR 0x05 -#define ATMEL_WRSR 0x01 -#define ATMEL_READ 0x03 -#define ATMEL_WRITE 0x02 +#define AT250X0_PAGE_SIZE 8 -#define ATMEL_SR_BSY 0x01 -#define ATMEL_SR_WEN 0x02 -#define ATMEL_SR_BP0 0x04 -#define ATMEL_SR_BP1 0x08 - -DEFINE_SPINLOCK(spi_eeprom_lock); - -static struct spi_dev_desc seeprom_dev_desc = { - .baud = 1500000, /* 1.5Mbps */ - .tcss = 1, - .tcsh = 1, - .tcsr = 1, - .byteorder = 1, /* MSB-First */ - .polarity = 0, /* High-Active */ - .phase = 0, /* Sample-Then-Shift */ - -}; -static inline int -spi_eeprom_io(int chipid, - unsigned char **inbufs, unsigned int *incounts, - unsigned char **outbufs, unsigned int *outcounts) -{ - return txx9_spi_io(chipid, &seeprom_dev_desc, - inbufs, incounts, outbufs, outcounts, 0); -} - -int spi_eeprom_write_enable(int chipid, int enable) +/* register board information for at25 driver */ +int __init spi_eeprom_register(int chipid) { - unsigned char inbuf[1]; - unsigned char *inbufs[1]; - unsigned int incounts[2]; - unsigned long flags; - int stat; - inbuf[0] = enable ? ATMEL_WREN : ATMEL_WRDI; - inbufs[0] = inbuf; - incounts[0] = sizeof(inbuf); - incounts[1] = 0; - spin_lock_irqsave(&spi_eeprom_lock, flags); - stat = spi_eeprom_io(chipid, inbufs, incounts, NULL, NULL); - spin_unlock_irqrestore(&spi_eeprom_lock, flags); - return stat; -} - -static int spi_eeprom_read_status_nolock(int chipid) -{ - unsigned char inbuf[2], outbuf[2]; - unsigned char *inbufs[1], *outbufs[1]; - unsigned int incounts[2], outcounts[2]; - int stat; - inbuf[0] = ATMEL_RDSR; - inbuf[1] = 0; - inbufs[0] = inbuf; - incounts[0] = sizeof(inbuf); - incounts[1] = 0; - outbufs[0] = outbuf; - outcounts[0] = sizeof(outbuf); - outcounts[1] = 0; - stat = spi_eeprom_io(chipid, inbufs, incounts, outbufs, outcounts); - if (stat < 0) - return stat; - return outbuf[1]; + static struct spi_eeprom eeprom = { + .name = "at250x0", + .byte_len = 128, + .page_size = AT250X0_PAGE_SIZE, + .flags = EE_ADDR1, + }; + struct spi_board_info info = { + .modalias = "at25", + .max_speed_hz = 1500000, /* 1.5Mbps */ + .bus_num = 0, + .chip_select = chipid, + .platform_data = &eeprom, + /* Mode 0: High-Active, Sample-Then-Shift */ + }; + + return spi_register_board_info(&info, 1); } -int spi_eeprom_read_status(int chipid) -{ - unsigned long flags; - int stat; - spin_lock_irqsave(&spi_eeprom_lock, flags); - stat = spi_eeprom_read_status_nolock(chipid); - spin_unlock_irqrestore(&spi_eeprom_lock, flags); - return stat; -} +/* simple temporary spi driver to provide early access to seeprom. */ -int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len) -{ - unsigned char inbuf[2]; - unsigned char *inbufs[2], *outbufs[2]; - unsigned int incounts[2], outcounts[3]; - unsigned long flags; - int stat; - inbuf[0] = ATMEL_READ; - inbuf[1] = address; - inbufs[0] = inbuf; - inbufs[1] = NULL; - incounts[0] = sizeof(inbuf); - incounts[1] = 0; - outbufs[0] = NULL; - outbufs[1] = buf; - outcounts[0] = 2; - outcounts[1] = len; - outcounts[2] = 0; - spin_lock_irqsave(&spi_eeprom_lock, flags); - stat = spi_eeprom_io(chipid, inbufs, incounts, outbufs, outcounts); - spin_unlock_irqrestore(&spi_eeprom_lock, flags); - return stat; -} +static struct read_param { + int chipid; + int address; + unsigned char *buf; + int len; +} *read_param; -int spi_eeprom_write(int chipid, int address, unsigned char *buf, int len) +static int __init early_seeprom_probe(struct spi_device *spi) { - unsigned char inbuf[2]; - unsigned char *inbufs[2]; - unsigned int incounts[3]; - unsigned long flags; - int i, stat; - - if (address / 8 != (address + len - 1) / 8) - return -EINVAL; - stat = spi_eeprom_write_enable(chipid, 1); - if (stat < 0) - return stat; - stat = spi_eeprom_read_status(chipid); - if (stat < 0) - return stat; - if (!(stat & ATMEL_SR_WEN)) - return -EPERM; - - inbuf[0] = ATMEL_WRITE; - inbuf[1] = address; - inbufs[0] = inbuf; - inbufs[1] = buf; - incounts[0] = sizeof(inbuf); - incounts[1] = len; - incounts[2] = 0; - spin_lock_irqsave(&spi_eeprom_lock, flags); - stat = spi_eeprom_io(chipid, inbufs, incounts, NULL, NULL); - if (stat < 0) - goto unlock_return; - - /* write start. max 10ms */ - for (i = 10; i > 0; i--) { - int stat = spi_eeprom_read_status_nolock(chipid); - if (stat < 0) - goto unlock_return; - if (!(stat & ATMEL_SR_BSY)) - break; - mdelay(1); + int stat = 0; + u8 cmd[2]; + int len = read_param->len; + char *buf = read_param->buf; + int address = read_param->address; + + dev_info(&spi->dev, "spiclk %u KHz.\n", + (spi->max_speed_hz + 500) / 1000); + if (read_param->chipid != spi->chip_select) + return -ENODEV; + while (len > 0) { + /* spi_write_then_read can only work with small chunk */ + int c = len < AT250X0_PAGE_SIZE ? len : AT250X0_PAGE_SIZE; + cmd[0] = 0x03; /* AT25_READ */ + cmd[1] = address; + stat = spi_write_then_read(spi, cmd, sizeof(cmd), buf, c); + buf += c; + len -= c; + address += c; } - spin_unlock_irqrestore(&spi_eeprom_lock, flags); - if (i == 0) - return -EIO; - return len; - unlock_return: - spin_unlock_irqrestore(&spi_eeprom_lock, flags); return stat; } -#ifdef CONFIG_PROC_FS -#define MAX_SIZE 0x80 /* for ATMEL 25010 */ -static int spi_eeprom_read_proc(char *page, char **start, off_t off, - int count, int *eof, void *data) -{ - unsigned int size = MAX_SIZE; - if (spi_eeprom_read((int)data, 0, (unsigned char *)page, size) < 0) - size = 0; - return size; -} - -static int spi_eeprom_write_proc(struct file *file, const char *buffer, - unsigned long count, void *data) -{ - unsigned int size = MAX_SIZE; - int i; - if (file->f_pos >= size) - return -EIO; - if (file->f_pos + count > size) - count = size - file->f_pos; - for (i = 0; i < count; i += 8) { - int len = count - i < 8 ? count - i : 8; - if (spi_eeprom_write((int)data, file->f_pos, - (unsigned char *)buffer, len) < 0) { - count = -EIO; - break; - } - buffer += len; - file->f_pos += len; - } - return count; -} +static struct spi_driver early_seeprom_driver __initdata = { + .driver = { + .name = "at25", + .owner = THIS_MODULE, + }, + .probe = early_seeprom_probe, +}; -__init void spi_eeprom_proc_create(struct proc_dir_entry *dir, int chipid) +int __init spi_eeprom_read(int chipid, int address, + unsigned char *buf, int len) { - struct proc_dir_entry *entry; - char name[128]; - sprintf(name, "seeprom-%d", chipid); - entry = create_proc_entry(name, 0600, dir); - if (entry) { - entry->read_proc = spi_eeprom_read_proc; - entry->write_proc = spi_eeprom_write_proc; - entry->data = (void *)chipid; - } + int ret; + struct read_param param = { + .chipid = chipid, + .address = address, + .buf = buf, + .len = len + }; + + read_param = ¶m; + ret = spi_register_driver(&early_seeprom_driver); + if (!ret) + spi_unregister_driver(&early_seeprom_driver); + return ret; } -#endif /* CONFIG_PROC_FS */ diff --git a/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c b/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c deleted file mode 100644 index 08b20cdfd7b..00000000000 --- a/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * linux/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c - * Copyright (C) 2000-2001 Toshiba Corporation - * - * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is - * licensed "as is" without any warranty of any kind, whether express - * or implied. - * - * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) - */ -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/interrupt.h> -#include <linux/module.h> -#include <linux/sched.h> -#include <linux/spinlock.h> -#include <linux/wait.h> -#include <asm/tx4938/spi.h> -#include <asm/tx4938/tx4938.h> - -static int (*txx9_spi_cs_func)(int chipid, int on); -static DEFINE_SPINLOCK(txx9_spi_lock); - -extern unsigned int txx9_gbus_clock; - -#define SPI_FIFO_SIZE 4 - -void __init txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on)) -{ - txx9_spi_cs_func = cs_func; - /* enter config mode */ - tx4938_spiptr->mcr = TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR; -} - -static DECLARE_WAIT_QUEUE_HEAD(txx9_spi_wait); - -static irqreturn_t txx9_spi_interrupt(int irq, void *dev_id) -{ - /* disable rx intr */ - tx4938_spiptr->cr0 &= ~TXx9_SPCR0_RBSIE; - wake_up(&txx9_spi_wait); - - return IRQ_HANDLED; -} - -static struct irqaction txx9_spi_action = { - .handler = txx9_spi_interrupt, - .name = "spi", -}; - -void __init txx9_spi_irqinit(int irc_irq) -{ - setup_irq(irc_irq, &txx9_spi_action); -} - -int txx9_spi_io(int chipid, struct spi_dev_desc *desc, - unsigned char **inbufs, unsigned int *incounts, - unsigned char **outbufs, unsigned int *outcounts, - int cansleep) -{ - unsigned int incount, outcount; - unsigned char *inp, *outp; - int ret; - unsigned long flags; - - spin_lock_irqsave(&txx9_spi_lock, flags); - if ((tx4938_spiptr->mcr & TXx9_SPMCR_OPMODE) == TXx9_SPMCR_ACTIVE) { - spin_unlock_irqrestore(&txx9_spi_lock, flags); - return -EBUSY; - } - /* enter config mode */ - tx4938_spiptr->mcr = TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR; - tx4938_spiptr->cr0 = - (desc->byteorder ? TXx9_SPCR0_SBOS : 0) | - (desc->polarity ? TXx9_SPCR0_SPOL : 0) | - (desc->phase ? TXx9_SPCR0_SPHA : 0) | - 0x08; - tx4938_spiptr->cr1 = - (((TXX9_IMCLK + desc->baud) / (2 * desc->baud) - 1) << 8) | - 0x08 /* 8 bit only */; - /* enter active mode */ - tx4938_spiptr->mcr = TXx9_SPMCR_ACTIVE; - spin_unlock_irqrestore(&txx9_spi_lock, flags); - - /* CS ON */ - if ((ret = txx9_spi_cs_func(chipid, 1)) < 0) { - spin_unlock_irqrestore(&txx9_spi_lock, flags); - return ret; - } - udelay(desc->tcss); - - /* do scatter IO */ - inp = inbufs ? *inbufs : NULL; - outp = outbufs ? *outbufs : NULL; - incount = 0; - outcount = 0; - while (1) { - unsigned char data; - unsigned int count; - int i; - if (!incount) { - incount = incounts ? *incounts++ : 0; - inp = (incount && inbufs) ? *inbufs++ : NULL; - } - if (!outcount) { - outcount = outcounts ? *outcounts++ : 0; - outp = (outcount && outbufs) ? *outbufs++ : NULL; - } - if (!inp && !outp) - break; - count = SPI_FIFO_SIZE; - if (incount) - count = min(count, incount); - if (outcount) - count = min(count, outcount); - - /* now tx must be idle... */ - while (!(tx4938_spiptr->sr & TXx9_SPSR_SIDLE)) - ; - - tx4938_spiptr->cr0 = - (tx4938_spiptr->cr0 & ~TXx9_SPCR0_RXIFL_MASK) | - ((count - 1) << 12); - if (cansleep) { - /* enable rx intr */ - tx4938_spiptr->cr0 |= TXx9_SPCR0_RBSIE; - } - /* send */ - for (i = 0; i < count; i++) - tx4938_spiptr->dr = inp ? *inp++ : 0; - /* wait all rx data */ - if (cansleep) { - wait_event(txx9_spi_wait, - tx4938_spiptr->sr & TXx9_SPSR_SRRDY); - } else { - while (!(tx4938_spiptr->sr & TXx9_SPSR_RBSI)) - ; - } - /* receive */ - for (i = 0; i < count; i++) { - data = tx4938_spiptr->dr; - if (outp) - *outp++ = data; - } - if (incount) - incount -= count; - if (outcount) - outcount -= count; - } - - /* CS OFF */ - udelay(desc->tcsh); - txx9_spi_cs_func(chipid, 0); - udelay(desc->tcsr); - - spin_lock_irqsave(&txx9_spi_lock, flags); - /* enter config mode */ - tx4938_spiptr->mcr = TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR; - spin_unlock_irqrestore(&txx9_spi_lock, flags); - - return 0; -} |