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authorRalf Baechle <ralf@linux-mips.org>2005-12-09 12:09:22 +0000
committer <ralf@denk.linux-mips.net>2006-01-10 13:39:07 +0000
commit11e6df65dc2bae8e7ad17ff81611ddc850b279cd (patch)
tree5a7ec8e178bb4aa5f12e130f7d0265e9206660da /arch/mips
parentb4672d37293cb045ec4d57e8b76a62810c96da71 (diff)
MIPS: MIPS boards: Get rid of useless SMP/non-SMP casing.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/mips-boards/generic/time.c15
1 files changed, 2 insertions, 13 deletions
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 72a12d931cb..2830f656fe2 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -77,7 +77,6 @@ static void mips_timer_dispatch (struct pt_regs *regs)
irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
-#ifdef CONFIG_SMP
int cpu = smp_processor_id();
if (cpu == 0) {
@@ -85,10 +84,9 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
* CPU 0 handles the global timer interrupt job and process accounting
* resets count/compare registers to trigger next timer int.
*/
- (void) timer_interrupt(irq, dev_id, regs);
+ timer_interrupt(irq, dev_id, regs);
scroll_display_message();
- }
- else {
+ } else {
/* Everyone else needs to reset the timer int here as
ll_local_timer_interrupt doesn't */
/*
@@ -104,15 +102,6 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
}
return IRQ_HANDLED;
-#else
- irqreturn_t r;
-
- r = timer_interrupt(irq, dev_id, regs);
-
- scroll_display_message();
-
- return r;
-#endif
}
/*