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authorRalf Baechle <ralf@linux-mips.org>2005-11-22 17:53:59 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-12-01 11:05:12 +0000
commit8b36612a23fda542fab5f0c6c26e15e2178e3d0e (patch)
treeb450d768b69bb89cecccc0321eade2d37174c8df /arch/mips
parent380b92537c23422b277ff66eb7086a092dbb75cb (diff)
[MIPS] R10000 and R12000 need to set MIPS_CPU_4K_CACHE ...
... because they have R4000-style caches. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/kernel/cpu-probe.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index a263fb7a397..5e1b08b00a3 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -417,7 +417,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
case PRID_IMP_R10000:
c->cputype = CPU_R10000;
c->isa_level = MIPS_CPU_ISA_IV;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
MIPS_CPU_LLSC;
@@ -426,7 +426,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
case PRID_IMP_R12000:
c->cputype = CPU_R12000;
c->isa_level = MIPS_CPU_ISA_IV;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
MIPS_CPU_LLSC;