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authorMilton Miller <miltonm@bga.com>2008-10-10 01:56:29 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-10-13 16:24:16 +1100
commitd13f7208b211dd3613bdb04e2647081a5160d68f (patch)
tree10ee3124943a30157f5598deb5bb800cc2db15d8 /arch/mn10300
parent78b5b626fa9048337530cc3ba4ceb9e4ee96a386 (diff)
powerpc/xics: Consolidate ipi message encode and decode
xics supports only one ipi per cpu, and expects software to use some queue to know why the interrupt was sent. In Linux, we use a an array of bitmaps indexed by cpu to identify the message. Currently the bits are set in smp.c and decoded in xics.c, with the data structure in a header file. Consolidate the code in xics.c similar to mpic and other interrupt controllers. Also, while making the the array static, the message word doesn't need to be volatile as set_bit and test_clear_bit take care of it for us, and put it under ifdef smp. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/mn10300')
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