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authorKumar Gala <galak@kernel.crashing.org>2007-07-03 02:35:35 -0500
committerKumar Gala <galak@kernel.crashing.org>2007-07-03 02:35:35 -0500
commitb533f8ae796d1ee0289bf04d4f1e72c02ad4a17d (patch)
tree4bec480194b251e18fee511df1cf4840a1995c88 /arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
parenteae98266e78e5659d75dbb62b4601960c15c7830 (diff)
[POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chips
Make the interrupt numbers match the OpenPIC spec intead of the Freescale docs which distinguish between internal and external interrupts. Now we can use the interrupt number directly to find the register offset associated with it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/86xx/mpc86xx_hpcn.c')
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c15
1 files changed, 1 insertions, 14 deletions
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 62b8a14213e..5b01ec7c13d 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -74,22 +74,9 @@ mpc86xx_hpcn_init_irq(void)
/* Alloc mpic structure and per isu has 16 INT entries. */
mpic1 = mpic_alloc(np, res.start,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
- 16, NR_IRQS - 4,
- " MPIC ");
+ 0, 256, " MPIC ");
BUG_ON(mpic1 == NULL);
- mpic_assign_isu(mpic1, 0, res.start + 0x10000);
-
- /* 48 Internal Interrupts */
- mpic_assign_isu(mpic1, 1, res.start + 0x10200);
- mpic_assign_isu(mpic1, 2, res.start + 0x10400);
- mpic_assign_isu(mpic1, 3, res.start + 0x10600);
-
- /* 16 External interrupts
- * Moving them from [0 - 15] to [64 - 79]
- */
- mpic_assign_isu(mpic1, 4, res.start + 0x10000);
-
mpic_init(mpic1);
#ifdef CONFIG_PCI