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authorJeff Garzik <jgarzik@pobox.com>2005-08-14 23:10:00 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-08-14 23:10:00 -0400
commit4c0e176dd5e4c44dd60f398518f75eedbe1a65f3 (patch)
tree07aea7539f78f221c6fc535a94a07befa2afdb63 /arch/ppc/platforms/4xx/ocotea.h
parentf241be74b803dcf9d70c9978292946370654320f (diff)
parent2ba84684e8cf6f980e4e95a2300f53a505eb794e (diff)
Merge /spare/repo/linux-2.6/
Diffstat (limited to 'arch/ppc/platforms/4xx/ocotea.h')
-rw-r--r--arch/ppc/platforms/4xx/ocotea.h13
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/ppc/platforms/4xx/ocotea.h b/arch/ppc/platforms/4xx/ocotea.h
index 202dc825119..33251153ac5 100644
--- a/arch/ppc/platforms/4xx/ocotea.h
+++ b/arch/ppc/platforms/4xx/ocotea.h
@@ -55,15 +55,24 @@
*/
#define RS_TABLE_SIZE 2
-/* OpenBIOS defined UART mappings, used before early_serial_setup */
+#if defined(__BOOTER__)
+/* OpenBIOS defined UART mappings, used by bootloader shim */
#define UART0_IO_BASE 0xE0000200
#define UART1_IO_BASE 0xE0000300
+#else
+/* head_44x.S created UART mapping, used before early_serial_setup.
+ * We cannot use default OpenBIOS UART mappings because they
+ * don't work for configurations with more than 512M RAM. --ebs
+ */
+#define UART0_IO_BASE 0xF0000200
+#define UART1_IO_BASE 0xF0000300
+#endif
#define BASE_BAUD 11059200/16
#define STD_UART_OP(num) \
{ 0, BASE_BAUD, 0, UART##num##_INT, \
(ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: UART##num##_IO_BASE, \
+ iomem_base: (void*)UART##num##_IO_BASE, \
io_type: SERIAL_IO_MEM},
#define SERIAL_PORT_DFNS \