diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-08 15:54:53 -0700 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-08 15:54:53 -0700 |
commit | f44702f49056c203341badaa2cb8a706160d9119 (patch) | |
tree | 72e2c6521db08690165aa4167d7b74941d020b22 /arch/sparc64/lib/mb.S | |
parent | 27e2df2228712af43e657b9768828448c64ba424 (diff) | |
parent | 4d803fcdcd97dd346d4b39c3b76e5879cead8a31 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
Diffstat (limited to 'arch/sparc64/lib/mb.S')
-rw-r--r-- | arch/sparc64/lib/mb.S | 73 |
1 files changed, 0 insertions, 73 deletions
diff --git a/arch/sparc64/lib/mb.S b/arch/sparc64/lib/mb.S deleted file mode 100644 index 4004f748619..00000000000 --- a/arch/sparc64/lib/mb.S +++ /dev/null @@ -1,73 +0,0 @@ -/* mb.S: Out of line memory barriers. - * - * Copyright (C) 2005 David S. Miller (davem@davemloft.net) - */ - - /* These are here in an effort to more fully work around - * Spitfire Errata #51. Essentially, if a memory barrier - * occurs soon after a mispredicted branch, the chip can stop - * executing instructions until a trap occurs. Therefore, if - * interrupts are disabled, the chip can hang forever. - * - * It used to be believed that the memory barrier had to be - * right in the delay slot, but a case has been traced - * recently wherein the memory barrier was one instruction - * after the branch delay slot and the chip still hung. The - * offending sequence was the following in sym_wakeup_done() - * of the sym53c8xx_2 driver: - * - * call sym_ccb_from_dsa, 0 - * movge %icc, 0, %l0 - * brz,pn %o0, .LL1303 - * mov %o0, %l2 - * membar #LoadLoad - * - * The branch has to be mispredicted for the bug to occur. - * Therefore, we put the memory barrier explicitly into a - * "branch always, predicted taken" delay slot to avoid the - * problem case. - */ - - .text - -99: retl - nop - - .globl mb -mb: ba,pt %xcc, 99b - membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad - .size mb, .-mb - - .globl rmb -rmb: ba,pt %xcc, 99b - membar #LoadLoad - .size rmb, .-rmb - - .globl wmb -wmb: ba,pt %xcc, 99b - membar #StoreStore - .size wmb, .-wmb - - .globl membar_storeload -membar_storeload: - ba,pt %xcc, 99b - membar #StoreLoad - .size membar_storeload, .-membar_storeload - - .globl membar_storeload_storestore -membar_storeload_storestore: - ba,pt %xcc, 99b - membar #StoreLoad | #StoreStore - .size membar_storeload_storestore, .-membar_storeload_storestore - - .globl membar_storeload_loadload -membar_storeload_loadload: - ba,pt %xcc, 99b - membar #StoreLoad | #LoadLoad - .size membar_storeload_loadload, .-membar_storeload_loadload - - .globl membar_storestore_loadstore -membar_storestore_loadstore: - ba,pt %xcc, 99b - membar #StoreStore | #LoadStore - .size membar_storestore_loadstore, .-membar_storestore_loadstore |