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authorMike Travis <travis@sgi.com>2008-12-16 17:33:54 -0800
committerMike Travis <travis@sgi.com>2008-12-16 17:40:56 -0800
commit95d313cf1c1ecedc8bec5727b09bdacbf67dfc45 (patch)
treeee4aa8aff232bb30bb725c5670bb67d73484022d /arch/x86/include/asm/bigsmp
parenta1681965011916c2f1f0f1f87e70784f5d5d5be5 (diff)
x86: Add cpu_mask_to_apicid_and
Impact: new API Add a helper function that takes two cpumask's, and's them and then returns the apicid of the result. This removes a need in io_apic.c that uses a temporary cpumask to hold (mask & cfg->domain). Signed-off-by: Mike Travis <travis@sgi.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Diffstat (limited to 'arch/x86/include/asm/bigsmp')
-rw-r--r--arch/x86/include/asm/bigsmp/apic.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
index dc6225ca48a..99f9abacf6a 100644
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -129,6 +129,22 @@ static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
return apicid;
}
+static inline unsigned int cpu_mask_to_apicid_and(const cpumask_t *cpumask,
+ const cpumask_t *andmask)
+{
+ int cpu;
+
+ /*
+ * We're using fixed IRQ delivery, can only return one phys APIC ID.
+ * May as well be the first.
+ */
+ while ((cpu = next_cpu(-1, *cpumask)) < nr_cpu_ids)
+ if (cpu_isset(cpu, *andmask))
+ return cpu_to_logical_apicid(cpu);
+
+ return BAD_APICID;
+}
+
static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
{
return cpuid_apic >> index_msb;