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authorYu Zhao <yu.zhao@intel.com>2009-04-09 14:57:39 +0800
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-04-22 15:59:41 -0700
commit1b6b8ce2ac372ea1f2065b89228ede105eb68dc5 (patch)
tree12a67c35d30ee626ca46d497c35f3a7d952034c5 /arch/x86/kernel/hpet.c
parentb10ceb5530df7ee6e81f92910589a34dd3e5690b (diff)
PCI: only save/restore existent registers in the PCIe capability
PCIe 1.1 base neither requires the endpoint to implement the entire PCIe capability structure nor specifies default values of registers that are not implemented by the device. So we only save and restore registers that must be implemented by different device types if the device PCIe capability version is 1. PCIe 1.1 Capability Structure Expansion ECN and PCIe 2.0 requires all registers in the PCIe capability to be either implemented or hardwired to 0. Their PCIe capability version is 2. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'arch/x86/kernel/hpet.c')
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