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| author | David Woodhouse <David.Woodhouse@intel.com> | 2008-10-21 19:42:20 +0100 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2008-10-21 19:42:20 +0100 |
| commit | b876d08f816527af257e13d89fb0d3b4b849223c (patch) | |
| tree | 40569f568230f918ca55f04b355e251747f913ed /arch/x86/mach-generic/numaq.c | |
| parent | b364776ad1208a71f0c53578c84619a395412a8d (diff) | |
| parent | 2515ddc6db8eb49a79f0fe5e67ff09ac7c81eab4 (diff) | |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
drivers/pci/dmar.c
Diffstat (limited to 'arch/x86/mach-generic/numaq.c')
| -rw-r--r-- | arch/x86/mach-generic/numaq.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c index 8cf58394975..71a309b122e 100644 --- a/arch/x86/mach-generic/numaq.c +++ b/arch/x86/mach-generic/numaq.c @@ -38,4 +38,18 @@ static int acpi_madt_oem_check(char *oem_id, char *oem_table_id) return 0; } +static cpumask_t vector_allocation_domain(int cpu) +{ + /* Careful. Some cpus do not strictly honor the set of cpus + * specified in the interrupt destination when using lowest + * priority interrupt delivery mode. + * + * In particular there was a hyperthreading cpu observed to + * deliver interrupts to the wrong hyperthread when only one + * hyperthread was specified in the interrupt desitination. + */ + cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; + return domain; +} + struct genapic apic_numaq = APIC_INIT("NUMAQ", probe_numaq); |