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authorHarald Welte <laforge@openmoko.org>2008-11-19 17:11:22 +0000
committerAndy Green <agreen@pads.home.warmcat.com>2008-11-19 17:11:22 +0000
commit87e863f323a3933b56a4cd1128a9f868ddea8bcc (patch)
treeab66d2f52d9749c47e60593278bf74e0bb1025f6 /arch
parent22920cc65faab3f8abab9e4a7077b8688fd38da0 (diff)
S3C24xx NAND: allow for faster timings
Tacls can actually be zero with some NAND flash devices, so we need to permit this. Also, the TACLS register actually specifies the actual number of HCLK clocks, where the TWRPH0 and TWRPH1 registers are auto-incremented by one HCLK clock in hardware. Signed-off-by: Harald Welte <laforge@openmoko.org>
Diffstat (limited to 'arch')
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