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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2006-06-23 20:57:48 +0200
committerPaul Mackerras <paulus@samba.org>2006-06-28 11:59:48 +1000
commit910ab66b1c94a2758725874d389136cf9acdc04c (patch)
tree79d35d7b83af309e13e4e028b72bd893e0433695 /arch
parent23cc770107c2d27dd1f5dee53177ea1163ee9295 (diff)
[POWERPC] spufs: fix MFC command queue purge
In the context save/restore code, the SPU MFC command queue purge code has a bug: static inline void wait_purge_complete(struct spu_state *csa, struct spu *spu) { struct spu_priv2 __iomem *priv2 = spu->priv2; /* Save, Step 28: * Poll MFC_CNTL[Ps] until value '11' is * read * (purge complete). */ POLL_WHILE_FALSE(in_be64(&priv2->mfc_control_RW) & MFC_CNTL_PURGE_DMA_COMPLETE); } This will exit as soon as _one_ of the 2 bits that compose MFC_CNTL_PURGE_DMA_COMPLETE is set, and one of them happens to be "purge in progress"... which means that we'll happily continue restoring the MFC while it's being purged at the same time. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index 3068b429b03..015a5178700 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -464,7 +464,8 @@ static inline void wait_purge_complete(struct spu_state *csa, struct spu *spu)
* Poll MFC_CNTL[Ps] until value '11' is read
* (purge complete).
*/
- POLL_WHILE_FALSE(in_be64(&priv2->mfc_control_RW) &
+ POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
+ MFC_CNTL_PURGE_DMA_STATUS_MASK) ==
MFC_CNTL_PURGE_DMA_COMPLETE);
}
@@ -1028,7 +1029,8 @@ static inline void wait_suspend_mfc_complete(struct spu_state *csa,
* Restore, Step 47.
* Poll MFC_CNTL[Ss] until 11 is returned.
*/
- POLL_WHILE_FALSE(in_be64(&priv2->mfc_control_RW) &
+ POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
+ MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==
MFC_CNTL_SUSPEND_COMPLETE);
}