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authorDavid Brownell <david-b@pacbell.net>2007-06-24 15:12:35 -0700
committerDavid Woodhouse <dwmw2@infradead.org>2007-06-28 22:37:36 +0100
commitfa0a8c71f352d89c54f2d3a92f7a8a97cdb7d9a4 (patch)
tree76e6f0d1ffe0bd02d7d38c3f7c2902d0b140fe18 /arch
parent7d5230ea3987ea3eaa03601fe429cb69f87de3e3 (diff)
[MTD] m25p80 handles more chips, uses JEDEC ids and small eraseblocks
Update chip ID tables in m25p80 to handle more SPI flash chips, matching datasheets. All of these can use the same core operations and are newer chips that support the JEDEC "read id" instruction: - Atmel AT25 and AT26 (seven chips) - Spansion S25SL (five chips) - SST 25VF (four chips) - ST M25, M45 (five more chips) - Winbond W25X series (seven chips) That JEDEC instruction is now used, either to support a sanity check on the platform data holding board configuration data, or to determine chip type when it's not included in platform data. In fact, boards that don't need a standard partition table may not need that platform data any more. For chips that support 4KiB erase units, use that smaller block size instead of the larger size (usually 64KiB); it's less wasteful. (Tested on W25X80.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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