diff options
| author | Tejun Heo <htejun@gmail.com> | 2008-05-19 01:15:10 +0900 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@redhat.com> | 2008-05-19 17:51:47 -0400 |
| commit | bf1bff6fa9fdd4e92e57d80a5434fd5201c051fc (patch) | |
| tree | 0ebd09fbf4e7f9f5e81e479685930c180eaece76 /drivers/cpufreq/cpufreq.c | |
| parent | e0614db2a398d4d0dc5fb47fe2c2783141262a3e (diff) | |
libata: increase PMP register access timeout to 3s
This timeout was set low because previously PMP register access was
done via polling and register access timeouts could stack up. This is
no longer the case. One timeout will make all following accesses fail
immediately.
In rare cases both marvell and SIMG PMPs need almost a second. Bump
it to 3s.
While at it, rename it to SATA_PMP_RW_TIMEOUT. It's not specific to
SCR access.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/cpufreq/cpufreq.c')
0 files changed, 0 insertions, 0 deletions