diff options
| author | Stephen Hemminger <shemminger@linux-foundation.org> | 2007-05-24 15:22:43 -0700 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2007-05-30 09:52:47 -0400 |
| commit | b4ed372b29e458021293e1c791d92d90f1bf5fe3 (patch) | |
| tree | 717bacf9e4679908db59f41d7f88147f28070b6f /drivers/net/sky2.c | |
| parent | 8903bab009d3e9b34050042f8c0faf741eb027be (diff) | |
sky2: dont set bogus bit in PHY register
This code inherited from the sk98lin driver is incorrect on the Yukon2.
The GPHY_CTRL register values are specific to the internal PHY of the chip
and the values used were leftovers.
Driver was setting bit 13 which is now the INT polarity for the PHY!
Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/sky2.c')
| -rw-r--r-- | drivers/net/sky2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 832fd69a0e5..d9bc98bd8af 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c @@ -658,7 +658,7 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port) const u8 *addr = hw->dev[port]->dev_addr; sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); - sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR|GPC_ENA_PAUSE); + sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); |