[PATCH] hostap: Remove experimental PCI bus master/DMA code

PCI version of Prism2.5/3 has undocumented DMA support for TX/RX data,
but this seems to have some hardware bugs that prevent it from being
used properly for TX. RX side could possibly be made to work reliably.

Even though DMA support would be very useful for saving host CPU (from
about 40% to 5-10% when operating at maximum throughput), it seems to
be best to just remove this code finally. The implementation has
always been commented out by default and has received very limited
testing. The code may have already been broken number of times and I
don't have much interested in trying to verify whether it works or
not. Getting this out makes it easier to maintain the driver and
allows some cleanups that have been partly postponed because of this
experimental bus master/DMA code.

Signed-off-by: Jouni Malinen <jkmaline@cc.hut.fi>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

1 files changed, 0 insertions, 31 deletions

diff --git a/drivers/net/wireless/hostap/hostap_config.h b/drivers/net/wireless/hostap/hostap_config.h
index 0b526febd1a..174068bffd8 100644
--- a/drivers/net/wireless/hostap/hostap_config.h
+++ b/drivers/net/wireless/hostap/hostap_config.h
@@ -13,37 +13,6 @@
 /* Maximum number of events handler per one interrupt */
 #define PRISM2_MAX_INTERRUPT_EVENTS 20
 
-/* Use PCI bus master to copy data to/from BAP (only available for
- * hostap_pci.o).
- *
- * Note! This is extremely experimental. PCI bus master is not supported by
- * Intersil and it seems to have some problems at least on TX path (see below).
- * The driver code for implementing bus master support is based on guessing
- * and experimenting suitable control bits and these might not be correct.
- * This code is included because using bus master makes a huge difference in
- * host CPU load (something like 40% host CPU usage to 5-10% when sending or
- * receiving at maximum throughput).
- *
- * Note2! Station firmware version 1.3.5 and primary firmware version 1.0.7
- * have some fixes for PCI corruption and these (or newer) versions are
- * recommended especially when using bus mastering.
- *
- * NOTE: PCI bus mastering code has not been updated for long time and it is
- * not likely to compile and it will _not_ work as is. Only enable this if you
- * are prepared to first fix the implementation..
- */
-/* #define PRISM2_BUS_MASTER */
-
-#ifdef PRISM2_BUS_MASTER
-
-/* PCI bus master implementation seems to be broken in current
- * hardware/firmware versions. Enable this to use enable command to fix
- * something before starting bus master operation on TX path. This will add
- * some latency and an extra interrupt to each TX packet. */
-#define PRISM2_ENABLE_BEFORE_TX_BUS_MASTER
-
-#endif /* PRISM2_BUS_MASTER */
-
 /* Include code for downloading firmware images into volatile RAM. */
 #define PRISM2_DOWNLOAD_SUPPORT