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author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-06-10 13:47:26 -0500 |
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committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-06-10 13:47:26 -0500 |
commit | f0cd91a68acdc9b49d7f6738b514a426da627649 (patch) | |
tree | 8ad73564015794197583b094217ae0a71e71e753 /include/asm-arm/arch-l7200/serial_l7200.h | |
parent | 60eef25701d25e99c991dd0f4a9f3832a0c3ad3e (diff) | |
parent | 128e6ced247cda88f96fa9f2e4ba8b2c4a681560 (diff) |
Merge ../linux-2.6
Diffstat (limited to 'include/asm-arm/arch-l7200/serial_l7200.h')
-rw-r--r-- | include/asm-arm/arch-l7200/serial_l7200.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-arm/arch-l7200/serial_l7200.h b/include/asm-arm/arch-l7200/serial_l7200.h index 238c595d97e..b1008a9d23e 100644 --- a/include/asm-arm/arch-l7200/serial_l7200.h +++ b/include/asm-arm/arch-l7200/serial_l7200.h @@ -28,7 +28,7 @@ #define UARTDR 0x00 /* Tx/Rx data */ #define RXSTAT 0x04 /* Rx status */ #define H_UBRLCR 0x08 /* mode register high */ -#define M_UBRLCR 0x0C /* mode reg mid (MSB of buad)*/ +#define M_UBRLCR 0x0C /* mode reg mid (MSB of baud)*/ #define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/ #define UARTCON 0x14 /* control register */ #define UARTFLG 0x18 /* flag register */ |