aboutsummaryrefslogtreecommitdiff
path: root/include/asm-arm/arch-ns9xxx
diff options
context:
space:
mode:
authorUwe Kleine-König <ukleinek@informatik.uni-freiburg.de>2007-03-28 18:06:41 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-04-21 20:51:11 +0100
commitf86bd61fd70af02e666a893aaf22653181423e99 (patch)
tree7c0d4cc8cb2ae6f398cbb731883362f75b4c8d64 /include/asm-arm/arch-ns9xxx
parent940089e007e8ed33295ef408b39a53e5ad518ebd (diff)
[ARM] 4294/1: ns9xxx: Determine system clock from PLL register settings
The function attribute const is abused here as the PLL register is read. But I think this is all right because the PLL register cannot change without a reset. Note: This patch depends on 4293/1 Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ns9xxx')
-rw-r--r--include/asm-arm/arch-ns9xxx/clock.h34
1 files changed, 32 insertions, 2 deletions
diff --git a/include/asm-arm/arch-ns9xxx/clock.h b/include/asm-arm/arch-ns9xxx/clock.h
index a7c5ab3d901..bf30cbdcc2b 100644
--- a/include/asm-arm/arch-ns9xxx/clock.h
+++ b/include/asm-arm/arch-ns9xxx/clock.h
@@ -11,13 +11,43 @@
#ifndef __ASM_ARCH_CLOCK_H
#define __ASM_ARCH_CLOCK_H
+#include <asm/arch-ns9xxx/regs-sys.h>
+
+#define CRYSTAL 29491200 /* Hz */
+
+/* The HRM calls this value f_vco */
static inline u32 ns9xxx_systemclock(void) __attribute__((const));
static inline u32 ns9xxx_systemclock(void)
{
+ u32 pll = SYS_PLL;
+
/*
- * This should be a multiple of HZ * TIMERCLOCKSELECT (in time.c)
+ * The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in
+ * time.c).
+ *
+ * The following values are given:
+ * - TIMERCLOCKSELECT == 2^i for an i in {0 .. 6}
+ * - CRYSTAL == 29491200 == 2^17 * 3^2 * 5^2
+ * - ND in {0 .. 31}
+ * - FS in {0 .. 3}
+ *
+ * Assuming the worst, we consider:
+ * - TIMERCLOCKSELECT == 64
+ * - ND == 0
+ * - FS == 3
+ *
+ * So HZ should be a divisor of:
+ * (CRYSTAL * (ND + 1) >> FS) / TIMERCLOCKSELECT
+ * == (2^17 * 3^2 * 5^2 * 1 >> 3) / 64
+ * == 2^8 * 3^2 * 5^2
+ * == 57600
+ *
+ * Currently HZ is defined to be 100 for this platform.
+ *
+ * Fine.
*/
- return 353894400;
+ return CRYSTAL * (REGGET(pll, SYS_PLL, ND) + 1)
+ >> REGGET(pll, SYS_PLL, FS);
}
static inline u32 ns9xxx_cpuclock(void) __attribute__((const));