diff options
author | Heiko Carstens <heiko.carstens@de.ibm.com> | 2006-12-04 15:40:36 +0100 |
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committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2006-12-04 15:40:36 +0100 |
commit | baf2aeb3d9e286add823bcaea5442ad4ee34f6e4 (patch) | |
tree | 380cda8e4fee61880f5fb9992ee2c2f726a357e1 /include/asm-avr32/cachectl.h | |
parent | c6b5b847a7cf11f131c43fe0041443ec11697fc7 (diff) |
[S390] Misaligned wait PSW at memory detection.
If the memory detection code would ever reach the point where it would
load the wait psw, it would generate a specification exception and the
system would crash at ipl time. This is because of a misaligned wait
psw. It needs to be on a double word boundary instead of a word
boundary.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'include/asm-avr32/cachectl.h')
0 files changed, 0 insertions, 0 deletions