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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-15 15:01:29 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-15 15:01:29 -0700 |
| commit | 7e2225d860772aaa07e1cebca6a5aa6f93f9aa91 (patch) | |
| tree | 8a4c3076c2043d011fcf2357835f4f16be7606a7 /include/asm-mips/barrier.h | |
| parent | 3a628b0fd42f7eaf9d052447784d48ceae9ffb8e (diff) | |
| parent | b27418aa551a153e8bf1bd16cf93e5786f9590a9 (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (54 commits)
[MIPS] Remove mips_machtype for LASAT machines
[MIPS] Remove mips_machtype from EMMA2RH machines
[MIPS] Remove mips_machtype from ARC based machines
[MIPS] MTX-1 flash partition setup move to platform devices registration
[MIPS] TXx9: cleanup and fix some sparse warnings
[MIPS] TXx9: rename asm-mips/mach-jmr3927 to asm-mips/mach-tx39xx
[MIPS] remove machtype for group Toshiba
[MIPS] separate rbtx4927_time_init() and rbtx4937_time_init()
[MIPS] separate rbtx4927_arch_init() and rbtx4937_arch_init()
[MIPS] txx9_cpu_clock setup move to rbtx4927_time_init()
[MIPS] txx9_board_vec set directly without mips_machtype
[MIPS] IP22: Add platform device for Indy volume buttons
[MIPS] cmbvr4133: Remove support
[MIPS] remove wrppmc_machine_power_off()
[MIPS] replace inline assembler to cpu_wait()
[MIPS] IP22/28: Add platform devices for HAL2
[MIPS] TXx9: Update and merge defconfigs
[MIPS] TXx9: Make single kernel can support multiple boards
[MIPS] TXx9: Update defconfigs
[MIPS] TXx9: Reorganize PCI code
...
Diffstat (limited to 'include/asm-mips/barrier.h')
| -rw-r--r-- | include/asm-mips/barrier.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/asm-mips/barrier.h b/include/asm-mips/barrier.h index 9d8cfbb5e79..8e9ac313ca3 100644 --- a/include/asm-mips/barrier.h +++ b/include/asm-mips/barrier.h @@ -92,11 +92,25 @@ #define fast_wmb() __sync() #define fast_rmb() __sync() #define fast_mb() __sync() +#ifdef CONFIG_SGI_IP28 +#define fast_iob() \ + __asm__ __volatile__( \ + ".set push\n\t" \ + ".set noreorder\n\t" \ + "lw $0,%0\n\t" \ + "sync\n\t" \ + "lw $0,%0\n\t" \ + ".set pop" \ + : /* no output */ \ + : "m" (*(int *)CKSEG1ADDR(0x1fa00004)) \ + : "memory") +#else #define fast_iob() \ do { \ __sync(); \ __fast_iob(); \ } while (0) +#endif #ifdef CONFIG_CPU_HAS_WB |