diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-10 14:48:43 -0700 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-10 14:48:43 -0700 |
commit | 0f166396e7e8931bb4acfd1a6ea1bd4f0b43f1dd (patch) | |
tree | 6279fa70695a4c56b7e935018a4c0fc1dfa82e68 /include/asm-mips/serial.h | |
parent | 5f60cfd932b42c69ed3226400cb5eab152576c3a (diff) | |
parent | 105b1bca4d7bed85bb296f7e7caec2fc643e9fbf (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (62 commits)
[MIPS] PNX8550: Cleanup proc code.
[MIPS] WRPPMC: Fix build.
[MIPS] Yosemite: Fix modpost warnings.
[MIPS] Change names of local variables to silence sparse
[MIPS] SB1: Fix modpost warning.
[MIPS] PNX: Fix modpost warnings.
[MIPS] Alchemy: Fix modpost warnings.
[MIPS] Non-FPAFF: Fix warning.
[MIPS] DEC: Fix modpost warning.
[MIPS] MIPSsim: Enable MIPSsim virtual network driver.
[MIPS] Delete Ocelot 3 support.
[MIPS] remove LASAT Networks platforms support
[MIPS] Early check for SMTC kernel on non-MT processor
[MIPS] Add debugfs files to show fpuemu statistics
[MIPS] Add some debugfs files to debug unaligned accesses
[MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
[MIPS] tc35815: Load MAC address via platform_device
[MIPS] Move FPU affinity code into separate file.
[MIPS] Make ioremap() work on TX39/49 special unmapped segment
[MIPS] rbtx4938: Update and minimize defconfig
...
Diffstat (limited to 'include/asm-mips/serial.h')
-rw-r--r-- | include/asm-mips/serial.h | 155 |
1 files changed, 0 insertions, 155 deletions
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index ce51213d84f..c07ebd8eb9e 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -19,159 +19,4 @@ */ #define BASE_BAUD (1843200 / 16) -/* Standard COM flags (except for COM4, because of the 8514 problem) */ -#ifdef CONFIG_SERIAL_DETECT_IRQ -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ) -#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ) -#else -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) -#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF -#endif - -#ifdef CONFIG_MACH_JAZZ -#include <asm/jazz.h> - -#ifndef CONFIG_OLIVETTI_M700 - /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know - exactly which ones ... XXX */ -#define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */ -#else -/* but the M700 isn't such a strange beast */ -#define JAZZ_BASE_BAUD BASE_BAUD -#endif - -#define _JAZZ_SERIAL_INIT(int, base) \ - { .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \ - .iomem_base = (u8 *) base, .iomem_reg_shift = 0, \ - .io_type = SERIAL_IO_MEM } -#define JAZZ_SERIAL_PORT_DEFNS \ - _JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE), \ - _JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE), -#else -#define JAZZ_SERIAL_PORT_DEFNS -#endif - -/* - * Galileo EV64120 evaluation board - */ -#ifdef CONFIG_MIPS_EV64120 -#include <mach-gt64120.h> -#define EV64120_SERIAL_PORT_DEFNS \ - { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \ - .flags = STD_COM_FLAGS, \ - .iomem_base = EV64120_UART0_REGS_BASE, .iomem_reg_shift = 2, \ - .io_type = SERIAL_IO_MEM }, \ - { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \ - .flags = STD_COM_FLAGS, \ - .iomem_base = EV64120_UART1_REGS_BASE, .iomem_reg_shift = 2, \ - .io_type = SERIAL_IO_MEM }, -#else -#define EV64120_SERIAL_PORT_DEFNS -#endif - -#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT -#define STD_SERIAL_PORT_DEFNS \ - /* UART CLK PORT IRQ FLAGS */ \ - { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ - { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ - { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ - { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ - -#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ -#define STD_SERIAL_PORT_DEFNS -#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ - -#ifdef CONFIG_MOMENCO_OCELOT_3 -#define OCELOT_3_BASE_BAUD ( 20000000 / 16 ) -#define OCELOT_3_SERIAL_IRQ 6 -#define OCELOT_3_SERIAL_BASE (signed)0xfd000020 - -#define _OCELOT_3_SERIAL_INIT(int, base) \ - { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \ - .flags = STD_COM_FLAGS, \ - .iomem_base = (u8 *) base, iomem_reg_shift: 2, \ - io_type: SERIAL_IO_MEM } - -#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ - _OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE) -#else -#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS -#endif - -#ifdef CONFIG_MOMENCO_OCELOT -/* Ordinary NS16552 duart with a 20MHz crystal. */ -#define OCELOT_BASE_BAUD ( 20000000 / 16 ) - -#define OCELOT_SERIAL1_IRQ 4 -#define OCELOT_SERIAL1_BASE 0xe0001020 - -#define _OCELOT_SERIAL_INIT(int, base) \ - { .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \ - .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \ - .io_type = SERIAL_IO_MEM } -#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ - _OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE) -#else -#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS -#endif - -#ifdef CONFIG_MOMENCO_OCELOT_C -/* Ordinary NS16552 duart with a 20MHz crystal. */ -#define OCELOT_C_BASE_BAUD ( 20000000 / 16 ) - -#define OCELOT_C_SERIAL1_IRQ 80 -#define OCELOT_C_SERIAL1_BASE 0xfd000020 - -#define OCELOT_C_SERIAL2_IRQ 81 -#define OCELOT_C_SERIAL2_BASE 0xfd000000 - -#define _OCELOT_C_SERIAL_INIT(int, base) \ - { .baud_base = OCELOT_C_BASE_BAUD, \ - .irq = (int), \ - .flags = STD_COM_FLAGS, \ - .iomem_base = (u8 *) base, \ - .iomem_reg_shift = 2, \ - .io_type = SERIAL_IO_MEM \ - } -#define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ - _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL1_IRQ, OCELOT_C_SERIAL1_BASE), \ - _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL2_IRQ, OCELOT_C_SERIAL2_BASE) -#else -#define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS -#endif - -#ifdef CONFIG_DDB5477 -#include <asm/ddb5xxx/ddb5477.h> -#define DDB5477_SERIAL_PORT_DEFNS \ - { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, \ - .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, \ - .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, \ - { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, \ - .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, \ - .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, -#else -#define DDB5477_SERIAL_PORT_DEFNS -#endif - -#ifdef CONFIG_SGI_IP32 -/* - * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory - * They are initialized in ip32_setup - */ -#define IP32_SERIAL_PORT_DEFNS \ - {},{}, -#else -#define IP32_SERIAL_PORT_DEFNS -#endif /* CONFIG_SGI_IP32 */ - -#define SERIAL_PORT_DFNS \ - DDB5477_SERIAL_PORT_DEFNS \ - EV64120_SERIAL_PORT_DEFNS \ - IP32_SERIAL_PORT_DEFNS \ - JAZZ_SERIAL_PORT_DEFNS \ - STD_SERIAL_PORT_DEFNS \ - MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ - MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ - MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS - #endif /* _ASM_SERIAL_H */ |